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PCF8545 датащи(PDF) 16 Page - NXP Semiconductors

номер детали PCF8545
подробное описание детали  Universal LCD driver for multiplex rates up to 1:8
PDF  68 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCF8545 датащи(HTML) 16 Page - NXP Semiconductors

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NXP Semiconductors
PCF8545
Universal LCD driver for multiplex rates up to 1:8
7.1.8 Command: load-data-pointer
The load-data-pointer command defines the start address of the display RAM. The
data pointer is auto incremented after each RAM write. The size of the display RAM is
dependent on the current multiplex drive mode setting, see Table 18.
Bit
Symbol
Value
Description
7 to 6
-
10
fixed value
Multiplex drive mode 1:8
5 to 0
DP[5:0]
00 0000[1] to
10 0111
6-bit binary value of 0 to 39
Multiplex drive mode 1:6
5 to 0
DP[5:0]
00 0000[1] to
10 1001
6-bit binary value of 0 to 41
Multiplex drive mode 1:4
5 to 0
DP[5:0]
00 0000[1] to
10 1011
6-bit binary value of 0 to 43
Table 18. Load-data-pointer - load data pointer command bit description
[1]
Default value.
Remark: Data pointer values outside of the valid range are ignored and no RAM content
is transferred until a valid data pointer value is set.
Filling of the display RAM is described in Section 7.9.
7.1.9 Command: write-RAM-data
This command initiates the transfer of data to the display RAM. Data is written into
the address defined by the load-data-pointer command. RAM filling is described in
Section 7.9.
Bit
Symbol
Value
Description
7 to 0
D[7:0]
0000 0000 to
1111 1111
writing data byte-wise to RAM
Table 19. Write-RAM-data - write RAM data command bit description[1]
[1]
For this command to be effective bit RS[1:0] of the control byte has to be set logic 01, see Table 24page 36.
7.2 Start-up and shut-down
7.2.1 Reset and Power-On Reset (POR)
After a reset and at power-on the PCF8545 resets to starting conditions as follows:
1. The display is disabled.
2. All backplane outputs are set to VSS.
3. All segment outputs are set to VSS.
4. Selected drive mode is: 1:8 with 1⁄4 bias.
5. The data pointers are cleared (set logic 0).
6. RAM data is not initialized. Its content can be considered to be random.
PCF8545
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 2 — 4 October 2021
16 / 68



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