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PCF8545 датащи(PDF) 34 Page - NXP Semiconductors |
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PCF8545 датащи(HTML) 34 Page - NXP Semiconductors |
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34 / 68 page ![]() NXP Semiconductors PCF8545 Universal LCD driver for multiplex rates up to 1:8 b0 b1 b2 b3 b4 b5 b6 b7 MSB LSB Transmitted data byte b7 b6 b5 b4 Discarded Display RAM addresses (columns)/segment outputs (S) Columns 0 1 2 3 4 5 6 7 37 38 39 40 41 0 1 2 3 4 5 b3 b2 b0 b1 b2 b3 b4 b5 b6 b7 MSB LSB Transmitted data byte b7 b6 b5 b4 Discarded 0 1 2 3 4 5 6 7 37 38 39 40 41 0 1 2 3 4 5 b0 b1 b2 b3 b4 b5 b6 b7 MSB LSB Transmitted data byte b7 b6 Discarded 0 1 2 3 4 5 6 7 37 38 39 40 41 0 1 2 3 4 5 013aaa458 Figure 23. Boundary condition in 1:6 multiplex drive mode 7.9.4 RAM filling in 1:8 multiplex drive mode In the 1:8 multiplex drive mode the RAM is organized in eight rows and 40 columns. The eight transmitted data bits are placed into eight rows of one display RAM column (see Figure 24). In order to fill the whole RAM, 40 bytes need to be sent to the PCF8545. After the last byte sent, the data pointer must be reset before the next RAM content update. Additional data bytes sent are discarded. PCF8545 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 2 — 4 October 2021 34 / 68 |
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