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PCF8545 датащи(PDF) 41 Page - NXP Semiconductors |
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PCF8545 датащи(HTML) 41 Page - NXP Semiconductors |
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41 / 68 page ![]() NXP Semiconductors PCF8545 Universal LCD driver for multiplex rates up to 1:8 013aaa464 data bus CE SUBADDRESS DATA DATA DATA Figure 32. Data transfer overview The subaddress byte opens the communication with a read/write bit and a subaddress. The subaddress is used to identify multiple devices on one SPI-bus. Bit Symbol Value Description data read or write selection 0 write data 7 R/W 1 read data 6 to 5 SA[1:0] 01 subaddress; other codes cause the device to ignore data transfer 4 to 0 - unused Table 30. Subaddress byte definition After the subaddress byte, a control byte follows (see Section 8.1). EXAMPLES a) transmit two bytes of display RAM data 013aaa465 0 0 1 control byte subaddress RAM/command byte RAM DATA M S B L S B R/W = 0 0 0 1 0 1 b) transmit two command bytes COMMAND 0 0 1 1 0 COMMAND c) transmit one command byte and two display RAM date bytes 0 0 C O R S 1 R S 0 0 0 0 COMMAND 0 0 1 1 0 0 0 0 1 RAM DATA RAM DATA RAM DATA Data transfers are terminated by de-asserting CE (set CE to logic 1). Figure 33. SPI-bus write example PCF8545 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 2 — 4 October 2021 41 / 68 |
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