MF4SAM3 datasheet(14/31 Pages) NXP

14 / 31 page

NXP Semiconductors

MF4SAM3

MIFARE SAM AV3 secure access module

MF4SAM3

All information provided in this document is subject to legal disclaimers.

Product short data sheet

Rev. 3.0 — 2 August 2019

COMPANY PUBLIC

561930

14 / 31

[1]

The active low RST_N input and outside reset state also the CLK input internally activate a resistive pull-down device to VSS. Accordingly a current is

flowing into the pad at voltages above 0 V. Figure 7 shows this input characteristic. In CLOCKSTOP mode the preferred electrical state on CLK is a LOW

level, in order to minimize the power consumption.

[2]

The CLK input internally has a resistive pull-up device to VDD activated during IC reset. Accordingly a current is flowing out of the pad at voltages below

VDD. Figure 8 shows this input characteristic.

Table 8. Electrical DC characteristics of TP1 and TP2

Conditions: (A) VDD = 1.62 to 1.98 V: VDDAE = VDD;

(B) VDD= 2.2 to 5.5 V (i.e. outside Class C supply range): VDDAE(NOM) = 1.8 V;

VSS = 0 V; Tamb = -25 °C to +85 °C, unless otherwise specified

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIHT

HIGH level input voltage

0.7 VDDAE -

VDDAE + 0.3 V

VILT

LOW level input voltage

-0.3

0.25 VDDAE V

IIHD

HIGH level input current

maximum (resistive pull-

down is on)

0.7 VDDAE ≤ VI ≤ VDDAE;

Test conditions for the maximum

absolute value:

VI = VDDAE;

VDDAE = VDDAE(max);

for the minium absolute value:

VI = 0.7 VDDAE;

VDDAE = VDDAE(min)

100

μA

IILD

LOW level input current

maximum (resistive pull-

down is on)

0 V ≤ VI ≤ 0.3 VDDAE;

Test conditions for the maximum

absolute value:

VI = 0.3 VDDAE;

VDDAE = VDDAE(max);

μA

IILIH3

Leakage input current at

input voltage beyond VDDAE

(resistive pull-down is on)

VDDAE < VI ≤ VDDAE + 0.3 V;

-25 °C ≤ Tamb ≤ 85 °C;

Test conditions:

VI = 2.3 V;

Tamb = +85 °C

150

μA

-0.3 V ≤ VI < 0 V;

-25 °C ≤ Tamb ≤ +30 °C;

Test conditions:

VI = -0.3 V;

Tamb = +30 °C

-150

μA

IILIL3

Leakage input current at

input voltage beyond VSS

(resistive pull-down is on)

-0.3 V ≤ VI < 0 V;

+30 °C < Tamb ≤ +85 °C;

Test conditions:

VI = -0.3 V;

Tamb = +85 °C

-300

μA

VOH2

HIGH level output voltage

IOH2 = -0.1 μA

VDDAE -

0.3

VOL2

LOW level output voltage

IOL2 = 1.2 μA

0.3

MF4SAM3 датащи(PDF) 14 Page - NXP Semiconductors

MF4SAM3 датащи(HTML) 14 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

датащи скачать

ссылки URL