MF4SAM3 datasheet(30/31 Pages) NXP

30 / 31 page

NXP Semiconductors

MF4SAM3

MIFARE SAM AV3 secure access module

MF4SAM3

All information provided in this document is subject to legal disclaimers.

Product short data sheet

Rev. 3.0 — 2 August 2019

COMPANY PUBLIC

561930

30 / 31

Figures

Fig. 1.

Block diagram ................................................... 5

Fig. 2.

Pin configuration PCM1.5 ................................. 6

Fig. 3.

Pin configuration HVQFN32 ..............................6

Fig. 4.

Operating conditions over voltage range ...........9

Fig. 5.

Input characteristic of IO1, IO2, IO3 in

"quasi-bidirectional" mode ...............................15

Fig. 6.

Input characteristic of IO1, IO2, IO3 in "weak

pull-up" input mode ......................................... 15

Fig. 7.

Input characteristic of CLK when the IC is not

in reset and of RST_N .................................... 16

Fig. 8.

Input characteristic of CLK during IC reset ......16

Fig. 9.

External clock drive and AC test timing

reference points of CLK, RST_N, IO1, IO2

and IO3 (see and ) ......................................... 19

Fig. 10.

Timing for I2C Slave bus ................................ 21

Fig. 11.

Package outline SOT617-3 ............................. 22

Fig. 12.

Package outline SOT658-1 ............................. 23

Fig. 13.

Packing information for HVQFN32 package

- Reel .............................................................. 24

MF4SAM3 датащи(PDF) 30 Page - NXP Semiconductors

MF4SAM3 датащи(HTML) 30 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

датащи скачать

ссылки URL