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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AT25SL321 датащи(PDF) 27 Page - Dialog Semiconductor |
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AT25SL321 датащи(HTML) 27 Page - Dialog Semiconductor |
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27 / 82 page  26 AT25SL321 DS-25SL321–112H–2020-10 8.11 Fast Read Dual Output (3Bh) By using two pins (IO0 and IO1, instead of just IO0), the Fast Read Dual Output instruction allows data to be transferred from the AT25SL321 at twice the rate of standard SPI devices. The Fast Read Dual Output instruction is ideal for quickly downloading code from Flash to RAM upon power-up or for application that cache code- segments to the RAM for execution. The Fast Read Dual Output instruction can operate at the highest possible frequency of FR (see AC Electrical Characteristics). After the 24-bit address, eight “dummy” clocks are inserted to allow the internal circuits time set up the initial address. During the dummy clocks, the data value on the SO pin is a “don’t care”. However, the IO0 pin is going to be high-impedance prior to the falling edge of the first data out clock. This is shown in Figure 8-14. Figure 8-14. Fast Read Dual Output Instruction (SPI Mode) |
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