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AT25QL321 датащи(PDF) 60 Page - Dialog Semiconductor |
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AT25QL321 датащи(HTML) 60 Page - Dialog Semiconductor |
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60 / 79 page ![]() 59 AT25QL321 DS-25QL321–131C–5/2017 Figure 7-59. Enter Secured OTP instruction for SPI Mode (left) and QPI Mode (right) 7.37 Exit Secured OTP (C1h) The Exit Secured OTP instruction is for exiting the additional 4K‐bit secured OTP mode. (Please refer to Figure 7-60). Figure 7-60. Exit Secured OTP instruction for SPI Mode (left) and QPI Mode (right) 7.38 Read Security Register (2Bh) The Read Security Register can be read the value of Security Register bits at any time (even in program/erase/write status register-1 and write status register-2 condition) and continuously. Secured OTP Indicator bit. The Secured OTP indicator bit shows the chip is locked by factory before ex-factory or not. When it is “0”, it indicates non-factory lock, “1” indicates factory-lock. Lock-down Secured OTP (LDSO) bit. By writing Write Security Register instruction, the LDSO bit may be set to “1” for customer lock‐down purpose. However, once the bit it set to “1” (Lock‐down), the LDSO bit and the 4K‐bit Secured OTP area cannot be updated any more. While it is in 4K‐bit Secured OTP mode, array access is not allowed to write. |
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