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AT25QL321 датащи(PDF) 6 Page - Dialog Semiconductor

номер детали AT25QL321
подробное описание детали  32-Mbit, 1.7V Minimum SPI Serial Flash Memory with Dual I/O, Quad I/O and QPI Support
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AT25QL321
DS-25QL321–131C–5/2017
WP (I/O2)
WRITE PROTECT
The Write Protect (WP) pin can be used to protect the Status Register against data
modification. The WP pin is active low. When the QE bit of Status Register-2 is set for Quad
I/O, the WP pin (Hardware Write Protect) function is not available since this pin is used for IO2.
See figures 1-1, 1-2, and 1-3 for the pin configuration of Quad I/O and QPI operation.
-
Input/Output
ACC
ACCELERATED PROGRAMMING
The device offers accelerated program operations through the ACC function. This
function is primarily intended to allow faster manufacturing throughput at the factory.
If the system asserts VHH on this pin, the device uses the higher voltage on the pin to
reduce the time required for program operations. Removing VHH from the ACC pin
returns the device to normal operation.
Note that the ACC pin must not be at VHH for operations other than accelerated
programming, or device damage may result. In addition, the ACC pin must not be left
floating or unconnected; inconsistent behavior of the device may result. The ACC
function is only available during standard SPI Mode.
HOLD
(I/O3)
HOLD
The HOLD pin is used to pause a serial sequence of the SPI flash memory without
resetting the clocking sequence. To enable the HOLD mode, the CS must be in low state.
The HOLD mode effects on with the falling edge of the HOLD signal with CLK being low.
The HOLD mode ends on the rising edge of HOLD signal with SCK being low.
In other words, HOLD mode can't be entered unless SCK is low at the falling edge of the
HOLD signal. And HOLD mode can't be exited unless SCK is low at the rising edge of the
HOLD signal.
If CS is driven high during a HOLD condition, it resets the internal logic of the device. As
long as HOLD signal is low, the memory remains in the HOLD condition. To re-work
communication with the device, HOLD must go high, and CS must go low. See Figure
8.11 for HOLD timing.
-
Input/Output
VCC
DEVICE POWER SUPPLY: VCC is the supply voltage. It is the single voltage used for all
device functions including read, program, and erase. The VCC pin is used to supply the
source voltage to the device. Operations at invalid VCC voltages may produce spurious results
and should not be attempted.
-
Power
GND
GROUND:
VSS is the reference for the VCC supply voltage. The ground reference for the
power supply. GND should be connected to the system ground.
-
Power
Table 1-1.
Pin Descriptions (Continued)
Symbol
Name and Function
Asserted
State
Type



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