AT25DF641A datasheet(2/58 Pages) DIALOG

2 / 58 page

8793F–DFLASH–11/2017

Features



Single 2.7V - 3.6V supply



Serial Peripheral Interface (SPI) compatible

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Supports SPI Modes 0 and 3

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Supports RapidS™ operation

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Supports Dual-Input Program and Dual-Output Read

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Very high operating frequencies

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100MHz for RapidS

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85MHz for SPI

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Clock-to-output time (tV) of 5ns maximum

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Flexible, optimized erase architecture for code + data storage applications

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Uniform 4KB, 32KB, and 64KB Block Erase

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Full Chip Erase

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Individual sector protection with Global Protect/Unprotect feature

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128 Sectors of 64KB each

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Hardware controlled locking of protected sectors via WP pin

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Sector Lockdown

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Make any combination of 64KB sectors permanently read-only

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128-byte One-Time Programmable (OTP) Security Register

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64 bytes factory preprogrammed

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64 bytes user programmable

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Flexible programming

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Byte/Page Program (1 to 256 bytes)

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Fast program and erase times

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2.5ms typical Page Program (256 bytes) time

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75ms typical 4KB Block Erase time

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300ms typical 32KB Block Erase time

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600ms typical 64KB Block Erase time

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Program and Erase Suspend/Resume

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Automatic checking and reporting of erase/program failures

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Software controlled reset

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JEDEC Standard Manufacturer and Device ID Read Methodology

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Low power dissipation

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25mA Active Read current (typical at 20MHz)

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5µA Deep Power-Down current (typical)

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Endurance: 100,000 program/erase cycles

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Data retention: 20 years

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Complies with full industrial temperature range

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Industry standard green (Pb/Halide-free/RoHS compliant) package options

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8-lead SOIC (0.208” wide)



8-pad Ultra-thin DFN (5 x 6 x 0.6mm)

AT25DF641A

64-Mbit, 2.7V Minimum SPI Serial Flash Memory

with Dual–I/O Support

DATASHEET

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