6.

Memory Organization

The AT24CSW04X is internally organized as 32 pages of 16 bytes each and the AT24CSW08X is organized as

64 pages of 16 bytes each for the EEPROM array. The device also contains a 32‑byte Security register which

is organized as two pages of 16 bytes each. This register contains a factory-programmed ensured unique 128‑bit

serial number in the lower 16 bytes. The upper 16 bytes are user‑programmable and can (later) be permanently

write‑protected (see Security Register).

Figure 6-1. Memory Organization

Main

4-Kbit or 8-Kbit

EEPROM

256-bit

Security

Register

4-Kbit

Address Range (000h-1FFh)

8-Kbit

Address Range (000h-3FFh)

User-Programmable Memory

Address Range (90h-9Fh)

128-bit Serial Number

Address Range (80h-8Fh)

Permanently Lockable

by Software

Read-Only

Five Different Levels

of Block Protection from

Write Protect Register

Memory Address Range

Protection

Features

The AT24CSW04X/AT24CSW08X also contains an 8‑bit Write Protection register that controls which regions of the

memory can be written to. Details about how to use this register can be found in Write Protection.

6.1

Device Addressing

Accessing the device requires an 8-bit device address byte following a Start condition to enable the device for a read

or write operation. Since multiple client devices can reside on the serial bus, each client device must have its own

unique address so the host can access each device independently.

The Most Significant four bits of the device address byte is referred to as the device type identifier. The device type

identifier ‘1010’ (Ah) for the main EEPROM access or ‘1011’ (Bh) for Security register and Write Protection register

access is required in bits 7 through 4 of the device address byte (see Table 6‑1).

Following the 4‑bit device type identifier are the client address bits, A2 and A1. The value that the AT24CSW04X/

AT24CSW08X will ACK to is preprogrammed in each device. Unique ordering codes are available for each of the

four (AT24CSW04X) or two (AT24CSW08X) possible client combinations. The client address preprogrammed in the

device is embedded in the base part number as shown in Table 6-3 and Table 6-4.

The AT24CSW04X/AT24CSW08X contains a 32‑byte Security register, organized as 2 pages of 16 bytes each. This

register contains a factory‑programmed unique 128‑bit serial number in the lower 16 bytes. The upper 16 bytes are

user‑programmable and can (later) be permanently write‑protected (see Write Operations in the Security Register).

Access to the Security register memory location is similar to the EEPROM region with the exception that the device

address word must begin with '1011' (Bh). The behavior of the hardware address bits (A2, A1) remains the same

as during an EEPROM addressing sequence (see Table 6-3 and Table 6-4). While the lower order 16 bytes of the

Security register are read‑only, the device will ACK if this bit is a logic '0'. To read from the Security register, refer to

Read Operations in the Security Register and for writing refer to Write Operations in the Security Register.

Note:  Accessing the Security register is only possible if any sequence or command to the EEPROM (if one was

sent) is properly terminated with a NACK or Stop condition from the host. Without proper termination of that previous

sequence, all communications with the Security register will not execute successfully.

AT24CSW04X/AT24CSW08X

Memory Organization

and its subsidiaries

Datasheet

DS20006426B-page 16