FXLS90130 datasheet(13/247 Pages) NXP

13 / 247 page

NXP Semiconductors

FXLS9xxx0

Single channel inertial sensor

Pin Name

Definition

Description

TEST_MISO SPI Data Out

This pin must be left unconnected.

VBUF

Power

Supply

This pin is connected to a buffer regulator for the internal circuitry. The buffer

regulator supplies the internal regulators to provide immunity from EMC and

supply dropouts. An external capacitor must be connected between this pin

and VSS as shown in Figure 2, Figure 3, and Figure 4.

BUS_I

Supply and

Communication

Receiver

This pin is connected to the supply line and supplies power to the device. An

external filter must be connected between this pin and BUSRTN as shown in

Figure 2, Figure 3, and Figure 4.

IDATA

Communication

Transmitter

This pin modulates the response current for DSI3 and PSI5 communication.

An external filter must be connected between this pin and BUSRTN as shown

in Figure 2, Figure 3, and Figure 4.

PAD

Die Attach Pad This pin is the die attach flag, and must be connected to VSS. See Section 16

for die attach pad connection details.

Table 10. Device pinout: DSI3 or PSI5 mode pinout...continued

10 Electrical characteristics

Section 10.1 through Section 10.20 contain tables with "Test notes". The note identifiers

cross reference to the identifiers and descriptions found in Table 11.

Identifier Description

Indicates critical characteristic.

Parameter tested 100 % at final test. Temperature = –40 °C, 25 °C, and 105 °C, VBUS_I

= 7 V, Unless otherwise stated

Parameter tested 100 % at final test during safe launch

Parameter verified by pass/fail testing at final test

Parameter verified by pass/fail testing at final test during safe launch

Parameter verified by qualification testing

Parameter verified by characterization

Functionality verified by modeling, simulation and/or design verification.

Circuit integrity assured through IDDQ and scan testing. Timing is determined by

internal system clock frequency.

Parameter verified by functional evaluation

Thermal resistance provided with device mounted to a 2 layer, 1.6 mm FR4 PCB as

documented in AN1902 with 1 signal layer and 1 ground layer.

Digital low-pass filter characteristics are specified independently and do not include g-

cell characteristics. Higher frequency filters will have lower system cut-off frequencies

due to the g-cell damping.

Table 11. Test notes legend

FXLS9xxx0

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 8 February 2021

13 / 247

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