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FXLS90130 датащи(PDF) 28 Page - NXP Semiconductors |
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FXLS90130 датащи(HTML) 28 Page - NXP Semiconductors |
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28 / 247 page ![]() NXP Semiconductors FXLS9xxx0 Single channel inertial sensor VBUS_I_L_min ≤ (VBUS_I – VSS) ≤ VBUS_I_H_max, TL ≤ TA ≤ TH, ΔT ≤ 25 °C/min, unless otherwise specified # Characteristic Symbol Min Typ Max Units Test notes Response Transmission (Command and Response Mode) 10716 Response Chip Time tCHIP_CRM — 5 — µs 7, 8, 9 10742 Response Start Time (Section 12.3) tSTART_CRM — 295 — µs 7, 8, 9 Command Reception (Periodic Data Collection Mode) 10715 Command Bit Time (Section 12.4) tCmd_BitTime — 8 — µs 7, 8, 9 10743 Command Transmission Period (Section 12.4) tPER_PDCM 50 — — µs 7, 8, 9 Response Transmission (Periodic Data Collection Mode) 10714 Response Chip Time Typical (Section 11.2.15.4) tCHIP_PDCM 1.0 — 5.0 µs 7, 8, 9 10746 Min Programmed Start Time: PDCM_RSPSTx < 0x0015 tSTART_PDCM_Min — 20 — µs 7, 8, 9 10745 Min Programmed Start Time: BDM Enabled tSTART_PDCMBDMMin — 51 — µs 7, 8, 9 10744 Max Programmed Start Time: PDCM_RSPSTx = 0x1FFF tSTART_PDCM_Max — 8191 — µs 7, 8, 9 Response Transmission (Background Diagnostic Mode) 49314 Response Chip Time tCHIP_BDM — tCHIP_PDCM — µs 7, 8, 9 10747 Response Start Time (Section 12.4) tSTART_BDM — 20 — µs 7, 8, 9 10712 DSI Data Latency tLAT_DSI 0 — 2.00 µs 7, 8 OTP Program Timing 10711 Time to program an OTP User Region tOTP_WRITE_MAX — — 10 ms 7, 8, 9 Table 34. Dynamic electrical characteristics - DSI3...continued 10.12 Dynamic electrical characteristics - PSI5 VBUS_I_L_min ≤ (VBUS_I – VSS) ≤ VBUS_I_H_max, TL ≤ TA ≤ TH, ΔT ≤ 25 °C/min, unless otherwise specified # Characteristic Symbol Min Typ Max Units Test notes Initialization Timing 10748 Phase 1 tPSI5_INIT1 — 133 — ms 7, 8, 9 10758 Phase 2 (Synchronous Mode, k = 4, tS-S = 500 µs) tPSI5_INIT2_10s — 256 * tS-S — s 7, 8, 9 10757 Phase 2 (Asynchronous Mode, k = 8) tPSI5_INIT2_10a — 512 * tASYNC — s 7, 8, 9 10756 Phase 3 (Synchronous Mode, tS-S = 500 µs) tPSI5_INIT3_10s — 2 * tS-S — s 7, 8, 9 10755 Phase 3 (Asynchronous Mode) tPSI5_INIT3_10a — 2 * tASYNC — s 7, 8, 9 10754 PSI5 Self-test Start Time tPSI5ST_START — 30 — ms 7, 8 10753 PSI5 Self-test Time, including Post OC Startup Offset tST — 223 — ms 7, 8 41756 Programming Mode Entry Window tPME — 127 — ms 7, 8, 9 Synchronization Pulse 10759 Reset to first sync pulse (Program Mode Entry) tRS_PM 6 — — ms 7, 8, 9 10779 Reset to first sync pulse (Normal Mode) tRS tPSI5_INIT1 — — s 7, 8, 9 10778 Sync Pulse Period tS-S 175 — — µs 7, 8, 9 10777 Sync Pulse Width tSYNC 9 — — µs 7, 8, 9 10776 Sync Pulse Reference LPF time constant tSYNC_LPF 120 280 — µs 7, 9 Table 35. Dynamic electrical characteristics - PSI5 FXLS9xxx0 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 6 — 8 February 2021 28 / 247 |
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