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FBSGAM02PR50 датащи(PDF) 20 Page - Efficient Power Conversion Corporation. |
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FBSGAM02PR50 датащи(HTML) 20 Page - Efficient Power Conversion Corporation. |
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20 / 33 page ![]() ©2020 EPC SPACE EPC.SPACE 20 FBS-GAM02-P-R50 Datasheet Pin Descriptions (continued) N/C (Pin 9) Pins 9 is not internally connected. This “no connection” pin is recommended to be connected to the system PGND (plane) as good engineering practice to avoid coupling unwanted noise into the internal circuitry of the FBS-GAM02-P-R50. This may be done directly or using a 0 Ω jumper resistor. TBST (Pin 10) The TBST pin is connected directly to the bias side (the bootstrap diode cathode connection) of the internal bootstrap capacitor for the high-side gate driver. The TBST, in conjunction with the TOS pin, provides the end-user the ability to add additional external bootstrap capacitance to the high-side gate driver to allow the FBS-GAM02-P-R50 to be operated at lower switching frequencies (< 200kHz) than specified in this data-sheet. An external isolated power supply may be provided to Pins 8 (-) and 10 (+) to achieve DC operation of the high-side switch, only if great care is used in the design of this supply to insure that it may withstand the very high dV/dt signal present at Pins 8 and 10. If external bootstrap capacitance is required, then pin 10 should be left OPEN (no connection). VDD (Pin 11) The VDD pin (pin 11) is the high current reference (open drain) pin for the internal power eGaN® HEMT associated with high-side power driver. This pin should be connected directly to the system power (VDD) bus via a low impedance connection, preferably through a low impedance power plane. This pin should be properly bypassed to the system power ground (PGND) using the guidelines found in the “Recommended VDD-to-PGND Power Supply Bypassing” section, following. TOUT (Pin 12) The TOUT pin (pin 12) is the high-current output pin for the high-side driver in the FBS-GAM02-P-R50 module. This pin should be connected directly, via a low impedance connection, to the external load in high-side switch applications or to the BOUT pin (pin 11), and the load, in half-bridge configurations. The internal high-side gate driver circuitry is referenced to the TOUT pin, which is internally connected to the TOS pin (pin 8). This is a VERY high dV/dt and dI/dt pin and regardless of the switch configuration the connection to the external load should be as short as possible to minimize radiated EMI. BOUT (Pin 13) The BOUT pin (pin 13) is the high current output (open drain) pin for the internal power eGaN® HEMT associated with the low-side power driver. This pin should be connected directly, via a low impedance connection, to the external load in low-side switch applications or to the TOUT pin (pin 12), and the load, in half-bridge configurations. This is a VERY high dV/dt and dI/dt pin and the connection to the external load should be as short as possible to minimize radiated EMI. PGND (Pin 14) The PGND pin (pin 14) is the ground return (source) connection for the internal power circuitry eGaN® HEMT and high-speed gate driver circuitry associated with low-side power driver and for the power good and interface logic for the high-side driver. This pin should be connected directly to the system power return/ground plane to minimize common source inductance, and the voltage transients associated with this inductance. If load current sensing is required in the half-bridge configuration, this should be accomplished via a current sense transformer in series with the drain of the low-side power HEMT (pin 13). BCON (Pin 15) The BCON pin is the logic input for the input shoot-through protection for low-side power driver. The state of this pin follows the state of the TIN logic input pin. If input shoot-through protection is desired in the half-bridge configuration where both power drivers (low and high) must not be turned on simultaneously if the BIN and TIN logic inputs are simultaneously at logic “1”, then BCON (pin 15) should be externally connected to BSTP (pin 16). If no shoot-through protection is desired, then pin 15 should be left OPEN (no connection). Top (X-Ray) View 18 Pin Molded SMT Package with Pillar Pins 3 2 4 5 1 10 11 12 13 14 9 6 7 8 15 16 18 17 15 16 18 17 4 5 3 2 14 13 12 11 1 10 9 6 7 8 Bottom (Pad) View |
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