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M50FLW040A, M50FLW040B

Table 16. Lock Register Bit Definitions

Note: 1. Applies to Top Block Lock Register (T_BLOCK_LK) and Top Block [-1] Lock Register (T_MINUS01_LK) to Top Block [-7] Lock Reg-

ister (T_MINUS07_LK).

Table 17. General Purpose Inputs Register Definition

Note: 1. Applies to the General Purpose Inputs Register (GPI-REG).

Firmware Hub/Low Pin Count (FWH/LPC)

General Purpose Input Register

The FWH/LPC General Purpose Input Register

holds the state of the General Purpose Input pins,

GPI0-GPI4. When this register is read, the state of

these pins is returned. This register is read-only.

Writing to it has no effect.

The signals on the FWH/LPC Interface General

Purpose Input pins should remain constant

throughout the whole Bus Read cycle.

Manufacturer Code Register

Reading the Manufacturer Code Register returns

the value 20h, which is the Manufacturer Code for

STMicroelectronics. This register is read-only.

Writing to it has no effect.

Bit

Bit Name

Value

7-3

Reserved

2

Read-Lock

‘1’

Bus Read operations in this Block always return 00h.

‘0’

Bus read operations in this Block return the Memory Array contents. (Default

value).

1

Lock-Down

‘1’

Changes to the Read-Lock bit and the Write-Lock bit cannot be performed. Once a

‘1’ is written to the Lock-Down bit it cannot be cleared to ‘0’; the bit is always reset

to ‘0’ following a Reset (using RP or INIT) or after power-up.

‘0’

Read-Lock and Write-Lock can be changed by writing new values to them. (Default

value).

0

Write-Lock

‘1’

Program and Erase operations in this Block will set an error in the Status Register.

The memory contents will not be changed. (Default value).

‘0’

Program and Erase operations in this Block are executed and will modify the Block

contents.

Bit

Bit Name

Value

7-5

Reserved

4GPI4

‘1’

‘0’

3GPI3

‘1’

‘0’

2GPI2

‘1’

‘0’

1GPI1

‘1’

‘0’

0GPI0

‘1’

‘0’