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M50FLW040A датащи(PDF) 20 Page - STMicroelectronics

номер детали M50FLW040A
подробное описание детали  4 Mbit (5 x 64KByte Blocks 3 x 16 x 4KByte Sectors) 3V Supply Firmware Hub / Low Pin Count Flash Memory
PDF  52 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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M50FLW040A датащи(HTML) 20 Page - STMicroelectronics

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See Figure 27., for a suggested flowchart on using
the Block Erase command. Typical Block Erase
times are given in Table 18..
Sector Erase Command. The
Sector
Erase
command is used to erase a Uniform 4-KByte Sec-
tor, setting all of the bits to ‘1’. All previous data in
the sector are lost.
Two Bus Write operations are required to issue the
command. The second Bus Write cycle latches the
Sector address and starts the Program/Erase
Controller. Once the command is issued, subse-
quent Bus Read operations read the contents of
the Status Register. (See the section on the Status
Register for details on the definitions of the Status
Register bits.)
If the Block to which the Sector belongs is protect-
ed (FWH/LPC only) then the Sector Erase opera-
tion will abort, the data in the Sector will not be
changed, and the Status Register will indicate the
error.
During the Sector Erase operation the memory will
only accept the Read Status Register and Pro-
gram/Erase Suspend commands. All other com-
mands are ignored.
See Figure 27., for a suggested flowchart on using
the Sector Erase Command. Typical Sector Erase
times are given in Table 18..
Clear Status Register Command. The
Clear
Status Register command is used to reset Status
Register bits SR1, SR3, SR4 and SR5 to ‘0’. One
Bus Write is required to issue the command. Once
the command is issued, the device returns to its
previous mode, subsequent Bus Read operations
continue to output the data from the same area, as
before.
Once set, these Status Register bits remain set.
They do not automatically return to ‘0’, for exam-
ple, when a new program or erase command is is-
sued. If an error has occurred, it is essential that
any error bits in the Status Register are cleared, by
issuing the Clear Status Register command, be-
fore attempting a new program or erase com-
mand.
Program/Erase Suspend Command. The Pro-
gram/Erase Suspend command is used to pause
the Program/Erase Controller during a program or
Sector/Block Erase operation. One Bus Write cy-
cle is required to issue the command.
Once the command has been issued, it is neces-
sary to poll the Program/Erase Controller Status
bit until the Program/Erase Controller has paused.
No other commands are accepted until the Pro-
gram/Erase Controller has paused. After the Pro-
gram/Erase Controller has paused, the device
continues to output the contents of the Status Reg-
ister until another command is issued.
During the polling period, between issuing the Pro-
gram/Erase Suspend command and the Program/
Erase Controller pausing, it is possible for the op-
eration to complete. Once the Program/Erase
Controller Status bit indicates that the Program/
Erase Controller is no longer active, the Program
Suspend Status bit or the Erase Suspend Status
bit can be used to determine if the operation has
completed or is suspended.
During Program/Erase Suspend, the Read Memo-
ry Array, Read Status Register, Read Electronic
Signature and Program/Erase Resume com-
mands will be accepted by the Command Inter-
face. Additionally, if the suspended operation was
Sector Erase or Block Erase then the program
command will also be accepted. However, it
should be noted that only the Sectors/Blocks not
being erased may be read or programmed correct-
ly.
See Figure 25., and Figure 28., for suggested
flowcharts on using the Program/Erase Suspend
command. Typical times and delay durations are
given in Table 18..
Program/Erase Resume Command. The
Pro-
gram/Erase Resume command can be used to re-
start
the
Program/Erase
Controller
after
a
Program/Erase Suspend has paused it. One Bus
Write cycle is required to issue the command.
Once the command is issued, subsequent Bus
Read operations read the contents of the Status
Register.



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