L9026 datasheet(25/60 Pages) STMICROELECTRONICS

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The user can set the following parameters to configure the PWM generator:

•

duty cycle (bits PWM_LED_DC.DUTY_CYCLE)

–

8 configuration bits are available, with 100/255 duty cycle resolution for each LSB

–

The maximum duty cycle achievable is 100% (PWM_LED_DC.DUTY_CYCLE set to “11111111B”)

–

In case the duty cycle is changed, the next target is applied once the previous PWM period is over

and the new one is started. Once a new target is programmed, the behavior above is valid also if the

current duty is 100% while when the current duty is 0% the new target value is applied immediately.

•

frequency (bits CFG_1.PWM_DIV_LED)

–

2 configuration bits are available to select the frequency among 4 target values

Table 13. PWM LED generator available frequencies

CFG_2.PWM_DIV_LED

PWM frequency

00B

122.5 Hz

01B

245.1 Hz

10B

490.2 Hz

11B

980.4 Hz

•

Channels driven by PWM LED (PWM_SEL and PWM_MAP registers)

The correct sequence to use the PWM LED generator is:

•

define the frequency divider through CFG_1.PWM_LED_GEN bit.

•

define duty cycle control register through PWM_LED_DC register.

•

set up channel output control through PWM_SEL register (PWM LED corresponds to 0)

•

define channels driven by PWM selected in PWM_SEL through mapping register PWM_MAP

7.5

Power stages electrical specifications

3 V ≤ VDDIO ≤ 5.5 V; 6 ≤ VBATT ≤ 18 V; -40 °C ≤ Tj ≤ 150 °C unless otherwise noted. All voltages are referred to

GND pin.

Table 14. Power stages electrical parameters

Parameter

Description

Test condition

Min Typ

Max

Unit

RDS(ON)

On-State Resistance

TJ = 25 °C

0.75

Ω

RDS(ON)

On-State Resistance

TJ = 150 °C; IL = 100 mA

1.5

Ω

IL(NOM)

Nominal load current (all channels active) TJ ≤ 150 °C; Design info

260

500

EAS

Maximum energy dissipation single pulse T = 25 °C, IL = 2XIL(EAR)

EAS

Maximum energy dissipation single pulse T = 150 °C, IL = 400 mA

IL(EAR)

Load current for maximum energy

dissipation – repetitive (all channels

active)

TJ ≤ 150 °C; Design info

220

EAR

Maximum energy dissipation repetitive

pulses - 2*IL(EAR) (two channels in

parallel)

TJ(0) = 85 °C; IL(0) = 2*IL(EAR); 2*106

cycles

EAR

Maximum energy dissipation repetitive

pulses - IL(EAR)

T = 85 °C, 2*10exp6 cycles

VDS

Voltage at power transistor

-0.3

VD(CL)

Drain to GND Output clamping voltage

IL = 10 mA; Low-Side Configuration

L9026

Power stages electrical specifications

DS13397 - Rev 5

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