MAX17843ACB datasheet(28/131 Pages) MAXIM

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Once the signal is properly conditioned, the ADC can start

the conversion. The 12-bit conversion is stored in an ALU

versions. The ALU output is a 14-bit value and is ultimately

stored in a 16-bit register with the two least-significant bits

zero. Disabled channels result in a measurement value of

0000h. Unless stated otherwise, measurement values are

assumed to be 14-bit values. The 16-bit register values

can be converted to 14-bit values by dividing by 4 (and

vice versa). To convert the measurement value in register

CELLn to a voltage, convert the 14-bit hexadecimal value

to a decimal value and then convert to voltage as follows:

VCELLn = CELLn[15:2] x 5V/16384 = CELLn[15:2] x

305.176μV.

Input Range

The input range in unipolar mode is nominally 0 to 5V;

however, the ADC has reduced linearity at its range

extents and so accuracy is specified for the input range

0.2V to 4.8V. Some applications may require specified

accuracy below 0.2V, or even below 0V. To this end, the

bipolar mode (POLARITY = 1) has a nominal input range

of -2.5V to +2.5V, as shown in Table 4, with accuracy

specified from -2.3V to +2.3V.

The input range can effectively be extended from -2.5V to

+5V by taking one bipolar measurement and one unipo-

lar measurement. Any bipolar measurements over 2.3V

should be replaced with the unipolar measurement.

Note: Conversions for some diagnostic modes automati-

cally use either bipolar or unipolar mode, regardless of the

POLARITY bit value.

Block Voltage Input

The VBLKP input (total module voltage) is selected for

measurement by MEASUREEN14. The measurement

is stored in the VBLOCK register with a full-scale value

of 60V (3.662mV/bit). It can be compared to the sum

of the cell voltages as a diagnostic. To precondition

VBLKP for conversion, it is voltage-divided by a factor of

26. The divider is disconnected by default to minimize

power consumption. The divider is connected by setting

MEASUREEN15 (BLKCONNECT = 1) with sufficient set-

tling time prior to the acquisition. For high acquisition rates,

BLKCONNECT can remain enabled to reduce cycle time.

Table 4. Input Range

Figure 7. VBLKP Measurement

CELL INPUT VOLTAGE

CELLN[15:2] (14 BITS)

CELLN[15:0]

(16 BITS)

BIPOLAR MODE (V)

UNIPOLAR MODE (V)

HEXADECIMAL

DECIMAL

-2.5

0000h

2.5

2000h

8192d

8000h

+2.5

3FFFh

16383d

FFFCh

MUX

ADC

VREF

VTHRM

VBLKP

AGND

R2 = 384.5kΩ

R1 = 10MΩ – R2

VBLKP/26

MAX17843

12-Channel, High-Voltage Smart Sensor

Data-Acquisition Interface

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