GC5316 datasheet(15/75 Pages) TI

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GC5316

SLWS154A − JANUARY 2004 − REVISED MARCH 2004

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Table 14. Programming

VARIABLE

DESCRIPTION

cic_interp_decim(4:0)

The CIC decimation ratio (4 to 32) Ncic = cic_interp_decim + 1. This ratio applies to both A and B channels of

the DDC block.

cic_scale_a(4:0)

The shift value for the A channel.

cic_scale_b(4:0)

The shift value for the B channel.

cic_gain_ddc

When asserted, adds a gain of 12 dB at the CIC output.

cic_m2_ena_a(5:0)

Sets the differential delay value M for each of the CIC subtractor stages for the A channel. Cic_m2_ena_a(0)

controls m1 in the figure above.

cic_m2_ena_b (5:0)

Sets the differential delay value M for each of the CIC subtractor stages for the B channel.

cic_bypass

Test feature. Clear for normal operations.

ssel_cic(2:0)

Sets syncing (1 of 8 sources) for the CIC decimation moment.

2.3.6 Receive Compensation FIR Filter

The receive CFIR filter decimates the output of the CIC filter by a fixed factor of two. Filter coefficient size, input data

size, and output data size are 18 bits. The CFIR length can be programmed. This permits turning off taps and saving

power if shorter filters are appropriate. The CFIR power dissipation is proportional to its length. Exploiting symmetry

of the coefficients by setting symmetric_cfir saves a small amount of power (but provides no additional available

taps).

The maximum CFIR filter length is a function of GC5316 clock rate and output sample rate and is limited by the

number of coefficient memory registers. The maximum number of taps is 64 and the minimum number is 14. Lengths

between these limits can be specified in increments of 2.

Subject to the above minimum and maximum values, in the general case, the number of taps available is:

UMT Mode : 2

rxclk

output sample rate

CDMA Mode if cic_iterp_decim is even (decimating by an odd number) : 2

(cic_intrp_decim)

CDMA Mode if cic_iterp_decim is odd (decimating by an even number) : 2

(cic_intrp_decim

) 1)

For CDMA, assuming the GC5316 is clocked at 122.8 MHz and with 2x oversampled output data (2.4576 MSPS),

the CFIR filter length can range from 14 to 48 (not 50) in increments of 2.

For UMTS, at a GC5316 clock rate of 122.8 MHz with 2x oversampled output data (7.68 MSPS), the CFIR filter length

can range from 14 to 32, in increments of 2.

A single set of programmed tap values are used for both the A-side and B-side DDC channels (two CDMA channels)

within a single DDC block when in CDMA mode.

The CFIR filter performs the convolution, gain is applied at full precision, the signal is rounded, and then hard limited.

There is a shifter at the output of the filter the scales the data by either 2e−19 or 2e−18. The gain through the filter is

therefore:

Gain

+ Sum(CFIR coefficients)

2*19)cfir_gain where cfir_gain is 0 or 1

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