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LTC6906 датащи(PDF) 16 Page - Analog Devices |
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LTC6906 датащи(HTML) 16 Page - Analog Devices |
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16 / 28 page ![]() LTC6994-1/LTC6994-2 16 Rev. C For more information www.analog.com OPERATION Changing DIVCODE After Start-Up Following start-up, the A/D converter will continue monitoring VDIV for changes. Changes to DIVCODE will be recognized slowly, as the LTC6994 places a priority on eliminating any “wandering” in the DIVCODE. The typical delay depends on the difference between the old and new DIVCODE settings and is proportional to the master oscillator period. tDIVCODE = 16 • (∆DIVCODE + 6) • tMASTER A change in DIVCODE will not be recognized until it is stable, and will not pass through intermediate codes. A digital filter is used to guarantee the DIVCODE has settled to a new value before making changes to the output. How- ever, if the delay timing is active during the transition, the actual delay can take on a value between the two settings. Start-Up Time When power is first applied, the power-on reset (POR) circuit will initiate the start-up time, tSTART. The OUT pin is held low during this time and the IN pin has no control over the output. The typical value for tSTART ranges from 0.5msto8msdependingonthemasteroscillatorfrequency (independent of NDIV): tSTART(TYP) = 500 • tMASTER During start-up, the DIV pin A/D converter must determine the correct DIVCODE before the LTC6994 can respond to an input. The start-up time may increase if the supply or DIV pin voltages are not stable. For this reason, it is recommended to minimize the capacitance on the DIV pin so it will properly track V+. Less than 100pF will not extend the start-up time. At the end of tSTART the DIVCODE and IN pin settings are recognized, and the state of the IN pin is transferred to the output (without additional delay). If IN is high at the end of tSTART, OUT will go high. Otherwise OUT will remain low. The LTC6994-2 with POL = 1 is the exception because it inverts the signal. At this point, the LTC6994 is ready to respond to rising/falling edges on the input. DIV 500mV/DIV IN 2V/DIV OUT 2V/DIV LTC6994-1 V+ = 3.3V RSET = 200k 500µs/DIV 699412 F07a 512µs 256µs 4µs Figure 7a. DIVCODE Change from 0 to 2 DIV 500mV/DIV IN 2V/DIV OUT 2V/DIV LTC6994-1 V+ = 3.3V RSET = 200k 500µs/DIV 699412 F07b 256µs 4µs 512µs Figure 7b. DIVCODE Change from 2 to 0 IN V+ OUT tSTART (IN IGNORED) tPD 699412 F08 IF IN = 1 AT END OF tSTART* IF IN = 0 AT END OF tSTART* *LTC6994-2 WITH POL = 1 INVERTS THE OUTPUT Figure 8. Start-Up Timing Diagram |
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