TLE9461ES datasheet(86/140 Pages) INFINEON

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TLE9461ES

Lite CAN SBC Family

Supervision Functions

Datasheet

Rev.1.1

2019-09-27

The watchdog timer period is also the typical trigger time and defines the middle of the open window. Taking

the oscillator tolerances into account leads to a safe trigger area of:

tWD x 0.72 < safe trigger area < tWD x 1.20.

The typical closed window is defined to a width of 60% of the selected window watchdog timer period. Taking

the tolerances of the internal oscillator into account leads to the timings as defined in Figure 34.

A correct watchdog service immediately results in starting the next closed window.

If the trigger signal meets the closed window or the watchdog timer period elapses, then a watchdog reset is

created by setting the reset output RSTN Low and the SBC switches to SBC Restart or SBC Fail-Safe Mode.

Figure 34 Window Watchdog Definitions

12.2.3

Watchdog Setting Check Sum

A check sum bit is part of the SPI command to trigger the watchdog and to set the watchdog setting.

The sum of the 8 data bits in the register WD_CTRL needs to have even parity (see Equation (12.1)). This is

realized by either setting the bit CHECKSUM to 0 or 1. If the check sum is wrong, then the SPI command is

ignored, i.e. the watchdog is not triggered or the settings are not changed and the bit SPI_FAIL is set.

The checksum is calculated by taking all 8 data bits into account. The written value of the reserved bit 3 of the

WD_CTRL register is considered (even if read as ‘0’ in the SPI output) for checksum calculation, i.e. if a ‘1’ is

written on the reserved bit position, then a ‘1’ is used in the checksum calculation.

(12.1)

12.2.4

Watchdog during SBC Stop Mode

The watchdog can be disabled for SBC Stop Mode in SBC Normal Mode. For safety reasons a special sequence

must be followed in order to disable the watchdog as described in Figure 35. Two different SPI bits (WD_STM_

EN_0, WD_STM_ EN_1) in the registers WK_CTRL_0 and WD_CTRL need to be set.

closed window

open window

t / [tWD_TIMER]

safe trigger area

tWD x 0.72

tWD x 1.20

uncertainty

tWD x 0.48

tWD x 1.80

Watchdog Timer Period (WD_TIMER)

Typ. closed window

Typ. open window

tWD x 0.6

tWD x 1.0

tWD x 0.9

CHKSUM

Bit15

… Bit8

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