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ASL4501SHN датащи(PDF) 28 Page - NXP Semiconductors

номер детали ASL4501SHN
подробное описание детали  Four-phase boost converter
PDF  43 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

ASL4501SHN датащи(HTML) 28 Page - NXP Semiconductors

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ASL4501SHN
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 2 — 10 January 2018
28 of 43
NXP Semiconductors
ASL4501SHN
Four-phase boost converter
8.11.3 Diagnostics for the SPI
The device is evaluating all SPI access to the device for the correctness of the
commands. When the command is not allowed, the SPI_err bit is set.
The conditions that are considered as erratic accesses are:
• SPI write is attempted to a read-only location or reserved location
• SPI write is attempted during operation to a configuration register
• SPI read is attempted from a reserved location
• SPI command does not consist of a multiple of 16 clock counts
If an SPI access is considered to be erratic, no modifications to a SPI register are made.
The access after the erratic SPI command returns the diagnostic register and zero in the
data field.
For details concerning the SPI_err bit, see Section 8.10.
8.11.4 Register map
The addressable register space amounts to 128 registers from 00h to 7Fh. They are
separated into two groups as shown in Table 38. The register mapping is shown in
Table 39 and Table 42. The functional description of each bit can be found in the
dedicated chapter.
Fig 12. SPI frame format
aaa-016627
b15-b8 = Default
read reg of slave4
b7-b0 = Data from
0x44 of Slave4
b15-b8 = Default
read reg of slave2
b7-b0 = Data from
0x2 of Slave4
Response from previous sequence
b15-b8 = Default
read reg of slave2
b7-b0 = Data from
0x2 of Slave2
b15-b8 = Default
read reg of slave2
b7-b0 = Data from
0x2 of Slave2
Slave 4
b15 = 1
b14-b8 = 0x44
b7-b0 = xx
Slave 3
b15 = 0
b14-b8 = 0x2F
b7-b0 = 0xAF
Slave 2
b15 = 1
b14-b8 = 0x2
b7-b0 = xx
Slave 1
b15 = 0
b14-b8 = 0x1A
b7-b0 = 0xFF
b15-b8 = Default
read reg of slave1
b7-b0 = xx
b15-b8 = Default
read reg of slave3
b7-b0 = xx
b15-b8 = Default
read reg of slave3
b7-b0 = xx
b15-b8 = Default
read reg of slave1
b7-b0 = xx
b15-b8 = Default
read reg of slave1
b7-b0 = xx
b15 = 1
b14-b8 = 0x44
b7-b0 = xx
b15 = 0
b14-b8 = 0x2F
b7-b0 = 0xAF
b15 = 1
b14-b8 = 0x44
b7-b0 = xx
b15 = 0
b14-b8 = 0x2F
b7-b0 = 0xAF
b15 = 1
b14-b8 = 0x44
b7-b0 = xx
b15 = 1
b14-b8 = 0x2
b7-b0 = xx
Next command
for Slave4
Next command
for Slave3
Next command
for Slave2
Next command
for Slave4
Next command
for Slave3
Next command
for Slave2
Next command
for Slave1
Next command
for Slave3
Next command
for Slave4
Next command
for Slave4
b15-b8 = Default
read reg of slave1
b7-b0 = xx
XXX
Master SDO/
Slave1 SDI
SCLK
CSB
1st Sequence
1 x 16 SCLK’s
2 x 16 SCLK’s
3 x 16 SCLK’s
4 x 16 SCLK’s
1 x 16 SCLK’s
2 x 16 SCLK’s
3 x 16 SCLK’s
4 x 16 SCLK’s
2nd Sequence
Slave1 SDO/
Slave2 SDI
Slave2 SDO/
Slave3 SDI
Slave3 SDO/
Slave4 SDI
Slave4 SDO/
Master SDI
XXX
XXX
XXX
XXX
XXX
XXX
XXX
XXX
XXX
Current sequence Command
decoded by Slave



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