RA4W1 datasheet(2/105 Pages) RENESAS

2 / 105 page

R01DS0359EJ0100 Rev.1.00

Page 2 of 105

Mar 31, 2020

Features

■ Arm Cortex-M4 Core with Floating Point Unit (FPU)

 Armv7E-M architecture with DSP instruction set

 Maximum operating frequency: 48 MHz

 Support for 4-GB address space

 Arm Memory Protection Unit (Arm MPU) with 8 regions

 Debug and Trace: ITM, DWT, FPB, TPIU, and ETB

 CoreSight™ debug port: JTAG-DP and SW-DP

■ Memory

 512-KB code flash memory

 8-KB data flash memory (100,000 erase/write cycles)

 96-KB SRAM

 Flash Cache (FCACHE)

 Memory Protection Units

 Memory Mirror Function (MMF)

 128-bit unique ID

■ Connectivity

 Bluetooth Low Energy

- Bluetooth 5.0 core specification compliant BLE transceiver and

link layer

- Supporting LE 1M, 2M and Coded PHY, and LE Advertising

extension

- Dedicated AES-CCM (128-bit blocks) encryption circuit

 USB 2.0 Full-Speed (USBFS) module

- On-chip transceiver

- Compliant with USB Battery Charging Specification 1.2

 Serial Communications Interface (SCI) × 4

- UART

- Simple IIC

- Simple SPI

 Serial Peripheral Interface (SPI) × 2

 I2C bus interface (IIC) × 2

 Controller Area Network (CAN) module

■ Analog

 14-bit A/D Converter (ADC14)

 12-bit D/A Converter (DAC12)

 8-bit D/A Converter (DAC8) ×2 (for ACMPLP)

 Low Power Analog Comparator (ACMPLP) × 2

 Operational Amplifier (OPAMP) × 1

 Temperature Sensor (TSN)

■ Timers

 General PWM Timer 32-bit (GPT32) × 4

 General PWM Timer 16-bit (GPT16) × 3

 Asynchronous General-Purpose Timer (AGT) × 2

 Watchdog Timer (WDT)

■ Safety

 Error Correction Code (ECC) in SRAM

 SRAM parity error check

 Flash area protection

 ADC self-diagnosis function

 Clock Frequency Accuracy Measurement Circuit (CAC)

 Cyclic Redundancy Check (CRC) calculator

 Data Operation Circuit (DOC)

 Port Output Enable for GPT (POEG)

 Independent Watchdog Timer (IWDT)

 GPIO readback level detection

 Register write protection

 Main oscillator stop detection

 Illegal memory access

■ System and Power Management

 Low power modes

 Realtime Clock (RTC) with calendar and Battery Backup support

 Event Link Controller (ELC)

 DMA Controller (DMAC) × 4

 Data Transfer Controller (DTC)

 Key Interrupt Function (KINT)

 Power-on reset

 Low Voltage Detection (LVD) with voltage settings

■ Security and Encryption

 AES128/256

 GHASH

 True Random Number Generator (TRNG)

■ Human Machine Interface (HMI)

 Segment LCD Controller (SLCDC)

- Up to 9 segments × 4 commons

- Capacitive Touch Sensing Unit (CTSU)

■ Multiple Clock Sources

 Main clock oscillator (MOSC)

(1 to 20 MHz when VCC = 2.4 to 3.6 V)

(1 to 8 MHz when VCC = 1.8 to 2.4 V)

 Sub-clock oscillator (SOSC) (32.768 kHz)

 High-speed on-chip oscillator (HOCO)

(24, 32, 48, 64 MHz when VCC = 2.4 to 3.6 V)

(24, 32, 48 MHz when VCC = 1.8 to 3.6 V)

 Middle-speed on-chip oscillator (MOCO) (8 MHz)

 Low-speed on-chip oscillator (LOCO) (32.768 kHz)

 IWDT-dedicated on-chip oscillator (15 kHz)

 Clock trim function for HOCO/MOCO/LOCO

 Clock out support

■ General Purpose I/O Ports

 Up to 35 input/output pins

- Up to 3 CMOS input

- Up to 32 CMOS input/output

- Up to 4 input/output 5 V tolerant

- Up to 1 high current (20 mA)

■ Operating Voltage

 VCC: 1.8 to 3.6 V

■ Operating Temperature and Packages

 Ta = –40°C to +85°C

- 56-pin QFN (7 mm × 7 mm, 0.4 mm pitch)

High efficiency 48-MHz Arm® Cortex®-M4 core, 512-KB code flash memory, 96-KB SRAM, Segment LCD Controller,

Capacitive Touch Sensing Unit, Bluetooth Low Energy, USB 2.0 Full-Speed, 14-Bit A/D Converter, 12-Bit D/A Converter,

security and safety features.

RA4W1 Group

Datasheet

Features

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