RA4W1 datasheet(46/105 Pages) RENESAS

46 / 105 page

R01DS0359EJ0100 Rev.1.00

Page 46 of 105

Mar 31, 2020

RA4W1 Datasheet

2. Electrical Characteristics

Note 1.

Time until the clock can be used after the Main Clock Oscillator Stop bit (MOSCCR.MOSTP) is set to 0 (operating) when the

external clock is stable.

Note 2.

The VCC range that the PLL can be used is 2.4 to 3.6 V.

Note 3.

After changing the setting of the SOSCCR.SOSTP bit so that the sub-clock oscillator operates, only start using the sub-clock

oscillator after the sub-clock oscillation stabilization wait time elapses, that is greater than or equal to the value recommended

by the oscillator manufacturer.

Note 4.

The 48-MHz HOCO can be used within a VCC range of 1.8 V to 3.6 V.

Note 5.

The 64-MHz HOCO can be used within a VCC range of 2.4 V to 3.6 V.

Note 6.

This is a characteristic when HOCOCR.HCSTP bit is set to 0 (oscillation) in MOCO stop state.

When HOCOCR.HCSTP bit is set to 0 (oscillation) during MOCO oscillation, this specification is shortened by 1 μs.

Note 7.

Whether stabilization time has elapsed can be confirmed by OSCSF.HOCOSF.

Note 8.

This is a characteristic when PLLCR.PLLSTP bit is set to 0 (operation) in MOCO stop state.

When PLLCR.PLLSTP bit is set to 0 (operation) during MOCO oscillation, this specification is shortened by 1 μs.

Note 9.

When setting up the main clock, ask the oscillator manufacturer for an oscillation evaluation and use the results as the

recommended oscillation stabilization time. Set the MOSCWTCR register to a value equal to or greater than the recommended

stabilization time. After changing the setting of the MOSCCR.MOSTP bit so that the main clock oscillator operates, read the

OSCSF.MOSCSF flag to confirm that it is 1, then start using the main clock.

Figure 2.23

EXTAL external clock input timing

Figure 2.24

LOCO clock oscillation start timing

HOCO clock oscillation

stabilization time*6, *7

Except low-voltage

mode

tHOCO24

tHOCO32

37.1

μs

Figure 2.25

tHOCO48

43.3

tHOCO64

80.6

Low-Voltage mode

tHOCO24

tHOCO32

tHOCO48

tHOCO64

100.9

PLL input frequency*2

fPLLIN

12.5

MHz

PLL circuit oscillation frequency*2

fPLL

MHz

PLL clock oscillation stabilization time*8

tPLL

55.5

μs

Figure 2.27

PLL free-running oscillation frequency

fPLLFR

-8

-MHz

Sub-clock oscillator oscillation frequency

fSUB

32.768

kHz

Sub-clock oscillation stabilization time*3

tSUBOSC

-*3

Figure 2.28

Table 2.23

Clock timing (2 of 2)

Parameter

Symbol

Min

Typ

Max

Unit

Test conditions

tXH

tXcyc

EXTAL external clock input

VCC × 0.5

tXL

tXr

tXf

LOCO clock oscillator output

LOCOCR.LCSTP

tLOCO

RA4W1 датащи(PDF) 46 Page - Renesas Technology Corp

RA4W1 датащи(HTML) 46 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL