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STM8S датащи(PDF) 195 Page - STMicroelectronics |
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STM8S датащи(HTML) 195 Page - STMicroelectronics |
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195 / 467 page ![]() DocID14587 Rev 14 195/467 RM0016 16-bit advanced control timer (TIM1) 261 17.7.6 Status register 1 (TIM1_SR1) Address offset: 0x05 Reset value: 0x00 7 654 3210 BIF TIF COMIF CC4IF CC3IF CC2IF CC1IF UIF rc_w0 rc_w0 rc_w0 rc_w0 rc_w0 rc_w0 rc_w0 rc_w0 Bit 7 BIF: Break interrupt flag This flag is set by hardware as soon as the break input goes active. It can be cleared by software if the break input is not active. 0: No break event has occurred 1: An active level has been detected on the break input Bit 6 TIF: Trigger interrupt flag This flag is set by hardware on a trigger event (the active edge is detected on a TRGI signal, both edges are detected if trigger gated mode is selected). It is cleared by software. 0: No trigger event has occurred 1: Trigger interrupt pending Bit 5 COMIF: Commutation interrupt flag This flag is set by hardware on a COM (when capture/compare control bits - CCiE, CCiNE, OCiM - have been updated). It is cleared by software. 0: No COM has occurred 1: COM interrupt pending Bit 4 CC4IF: Capture/compare 4 interrupt flag Refer to CC1IF description Bit 3 CC3IF: Capture/compare 3 interrupt flag Refer to CC1IF description |
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