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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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DP83261AVF датащи(PDF) 72 Page - National Semiconductor (TI) |
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DP83261AVF датащи(HTML) 72 Page - National Semiconductor (TI) |
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72 / 132 page  70 Signal Descriptions (Continued) 72 PHY INTERFACE The PHY Interface signals transfer symbol pairs between the BMAC and PLAYER devices Transfers are synchronous using the 125 MHz Local Byte Clock signal (signal provided by the Clock Distribution Device) A control bit is used to indicate if a Data symbol pair or Control symbol pair or a mixed ControlData symbol pair are being transferred Parity is generated on the PHY Indicate and MA Indicate data Parity is checked on the PHY Request and MA Request data Symbol Pin IO Description PRP 114 O PHY Request Parity Odd parity for PRC and PRD7 – 0 PRC 112 O PHY Request Control 0 Indicates PRD7 – 0 contains a Data symbol pair 1 Indicates PRD7 – 0 contains a Control or mixed ControlData symbol pair PRD7 – 0 110 108 O PHY Request Data Contains a Data or Control symbol pair 105 103 99 97 95 92 PIP 115 I PHY Indicate Parity Odd parity for PIC and PID7 – 0 PIC 113 I PHY Indicate Control 0 Indicates PID7 – 0 contains a Data symbol pair 1 Indicates PID7 – 0 contains a Control or mixed ControlData symbol pair PID7 – 0 111 109 I PHY Indicate Data Contains a Data or a mixed ControlData symbol pair 107 104 102 98 96 93 72 |
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