MPC852T datasheet(11/80 Pages) FREESCALE

11 / 80 page

MPC852T Hardware Specifications, Rev. 3.1

Freescale Semiconductor

Mandatory Reset Configurations

One consequence of multiple power supplies is that when power is initially applied, the voltage rails ramp up at

different rates. The rates depend on the nature of the power supply, the type of load on each power supply, and the

manner in which different voltages are derived. The following restrictions apply:

•

VDDL must not exceed VDDH during power-on reset or power down.

•

VDDL must not exceed 1.9 V, and VDDH must not exceed 3.465.

These cautions are necessary for the long-term reliability of the part. If they are violated, the electrostatic discharge

(ESD) protection diodes are forward-biased, and excessive current can flow through these diodes. If the system

power supply design does not control the voltage sequencing, the circuit shown in Figure2 can be added to meet

these requirements. The MUR420 Schottky diodes control the maximum potential difference between the external

bus and core power supplies on power-on reset, and the 1N5820 diodes regulate the maximum potential difference

on power-down.

Figure 2. Example Voltage Sequencing Circuit

10 Mandatory Reset Configurations

The MPC852T requires a mandatory configuration during reset.

If hardware reset configuration word (HRCW) is enabled, by asserting the RSTCONF during HRESET assertion,

the HRCW[DBGC] value that is needed to be set to binary X1 in the hardware reset configuration word (HRCW)

and the SIUMCR[DBGC] should be programmed with the same value in the boot code after reset.

If hardware reset configuration word (HRCW) is disabled, by negating the RSTCONF during the HRESET

assertion, the SIUMCR[DBGC] should be programmed with binary X1 in the boot code after reset.

VDDH

VDDL

1N5820

MUR420

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