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MPC852T датащи(PDF) 33 Page - Freescale Semiconductor, Inc

номер детали MPC852T
подробное описание детали  Hardware Specifications
PDF  80 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC852T датащи(HTML) 33 Page - Freescale Semiconductor, Inc

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MPC852T Hardware Specifications, Rev. 3.1
Freescale Semiconductor
33
Bus Signal Timing
Table 10 provides interrupt timing for the MPC852T.
.
Figure 23 provides the interrupt detection timing for the external level-sensitive lines.
Figure 23. Interrupt Detection Timing for External Level Sensitive Lines
Figure 24 provides the interrupt detection timing for the external edge-sensitive lines.
Figure 24. Interrupt Detection Timing for External Edge Sensitive Lines
Table 10. Interrupt Timing
Num
Characteristic 1
1
The timings I39 and I40 describe the testing conditions under which the IRQ
lines are tested when being defined as level-sensitive. The IRQ lines are
synchronized internally and need not be asserted or negated with reference to
the CLKOUT.
The timings I41, I42, and I43 are specified to allow the correct function of the
IRQ lines detection circuitry, and have no direct relation with the total system
interrupt latency that the MPC852T is able to support.
All Frequencies
Unit
Min
Max
I39
IRQx valid to CLKOUT rising edge (set
up time)
6.00
ns
I40
IRQx hold time after CLKOUT
2.00
ns
I41
IRQx pulse width low
3.00
ns
I42
IRQx pulse width high
3.00
ns
I43
IRQx edge-to-edge time
4xTCLOCKOUT
—
CLKOUT
IRQx
I39
I40
CLKOUT
IRQx
I41
I42
I43
I43



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