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CS4364 датащи(PDF) 27 Page - Cirrus Logic |
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CS4364 датащи(HTML) 27 Page - Cirrus Logic |
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27 / 50 page ![]() DS619A1 27 CS4364 3.9 Grounding and Power Supply Arrangements As with any high resolution converter, the CS4364 requires careful attention to power supply and grounding arrangements if its potential performance is to be realized. The Typical Connection Diagram shows the rec- ommended power arrangements, with VA, VD, VLC, and VLS connected to clean supplies. If the ground planes are split between digital ground and analog ground, the GND pins of the CS4364 should be connect- ed to the analog ground plane. All signals, especially clocks, should be kept away from the FILT+ and VQ pins in order to avoid unwanted coupling into the DAC. 3.9.1 Capacitor Placement Decoupling capacitors should be placed as close to the DAC as possible, with the low value ceramic ca- pacitor being the closest. To further minimize impedance, these capacitors should be located on the same layer as the DAC. If desired, all supply pins with similar voltage ratings may be connected to the same supply, but a decoupling capacitor should still be placed on each supply pin. Note: All decoupling capacitors should be referenced to analog ground. The CDB4364 evaluation board demonstrates the optimum layout and power supply arrangements. 3.10 Analog Output and Filtering The CS4364 does not include phase or amplitude compensation for an external filter. Therefore, the DAC system phase and amplitude response will be dependent on the external analog circuitry. Figure 21 shows how the full-scale analog output level specification is derived. Figure 22 shows how the recommended output filtering with location for optional mute circuit AOUT Full-Scale Output Level= AOUT= 3.35 Vpp 4.175 V 2.5 V 0.825 V Figure 21. Full-Scale Output Figure 22. Recommended Output Filter |
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