CS4364 datasheet(21/50 Pages) CIRRUS

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DS619A1

CS4364

3.2

Mode Select

In hardware mode operation is determined by the Mode Select pins. The state of these pins are continually

scanned for any changes. These pins require connection to supply or ground as outlined in Figure 8. For

M0, M1, M2 supply is VLC and for M3 and M4 supply is VLS. Tables 4 - 6 show the decode of these pins.

In software mode, the operational mode and data format are set in the FM and DIF registers.

(DIF1)

(DIF0)

DESCRIPTION

FORMAT

FIGURE

Left Justified, up to 24-bit data

I2S, up to 24-bit data

Right Justified, 16-bit Data

Right Justified, 24-bit Data

Table 4. PCM Digital Interface Format, Hardware Mode Options

(DEM)

DESCRIPTION

Table 4

Single-Speed without De-Emphasis (4 kHz to 50 kHz sample rates)

Single-Speed with 44.1 kHz De-Emphasis; see Figure 18

Double-Speed (50 kHz to 100 kHz sample rates)

Quad-Speed (100 kHz to 200 kHz sample rates)

Auto Speed-Mode Detect (32 kHz to 200 kHz sample rates)

Auto Speed-Mode Detect with 44.1 kHz De-Emphasis; see Figure 18

Table 6

DSD Processor Mode

Table 5. Mode Selection, Hardware Mode Options

DESCRIPTION

64x oversampled DSD data with a 4x MCLK to DSD data rate

64x oversampled DSD data with a 6x MCLK to DSD data rate

64x oversampled DSD data with a 8x MCLK to DSD data rate

64x oversampled DSD data with a 12x MCLK to DSD data rate

128x oversampled DSD data with a 2x MCLK to DSD data rate

128x oversampled DSD data with a 3x MCLK to DSD data rate

128x oversampled DSD data with a 4x MCLK to DSD data rate

128x oversampled DSD data with a 6x MCLK to DSD data rate

Table 6. Direct Stream Digital (DSD), Hardware Mode Options

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