WM8771 datasheet(30/44 Pages) WOLFSON

30 / 44 page

WM8771

Product Preview

PP Rev 2.0 December 2001

DAC OUTPUT PHASE

The DAC Phase control word determines whether the output of each DAC is non-inverted or inverted

BIT

LABEL

DEFAULT

DESCRIPTION

Bit

DAC

Phase

DAC1L

1 = invert

DAC1R

1 = invert

DAC2L

1 = invert

DAC2R

1 = invert

DAC3L

1 = invert

DAC3R

1 = invert

DAC4L

1 = invert

10010

DAC Phase

7:0

PH[7:0]

00000000

DAC4R

1 = invert

ADC GAIN CONTROL

Control bits LAG[4:0] and RAG[4:0] control the ADC input gain, allowing the user to attenuate the

ADC input signal to match the full-scale range of the ADC. The gain is independently adjustable on

left and right inputs. Left and right inputs may also be independently muted. The LRBOTH control bit

allows the user to write the same attenuation value to both left and right volume control registers. The

ADC volume and mute also applies to the bypass signal path

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

4:0

LAG[4:0]

01100

(0dB)

Attenuation data for Left channel ADC gain in 1dB steps. See Table

MUTE

Mute for Left channel ADC:

0: Mute off

1: Mute on

11001

Attenuation

ADCL

LRBOTH

Setting LRBOTH will write the same gain value to LAG[4:0] and

RAG[4:0]

4:0

RAG[4:0]

01100

(0dB)

Attenuation data for right channel ADC gain in 1dB steps. See Table

MUTE

Mute for Right channel ADC:

0: Mute off

]1: Mute on

11010

Attenuation

ADCR

LRBOTH

Setting LRBOTH will write the same gain value to RAG[4:0] and

LAG[4:0]

WM8771 датащи(PDF) 30 Page - Wolfson Microelectronics plc

WM8771 датащи(HTML) 30 Page - Wolfson Microelectronics plc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

датащи скачать

ссылки URL