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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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WM8771 датащи(PDF) 29 Page - Wolfson Microelectronics plc |
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WM8771 датащи(HTML) 29 Page - Wolfson Microelectronics plc |
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29 / 44 page  Product Preview WM8771 w PP Rev 2.0 December 2001 29 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 7:0 RDA2[7:0] 11111111 (0dB) Digital Attenuation data for Right channel DACR2 in 0.5dB steps. See Table 10 01100 Digital Attenuation DACR2 8 UPDATE Not latched Controls simultaneous update of all Attenuation Latches 0: Store RDA2 in intermediate latch (no change to output) 1: Store RDA2 and update attenuation on all channels. 7:0 LDA3[7:0] 11111111 (0dB) Digital Attenuation data for Left channel DACL3 in 0.5dB steps. See Table 10 01101 Digital Attenuation DACL3 8 UPDATE Not latched Controls simultaneous update of all Attenuation Latches 0: Store LDA3 in intermediate latch (no change to output) 1: Store LDA3 and update attenuation on all channels. 7:0 RDA3[7:0] 11111111 (0dB) Digital Attenuation data for Right channel DACR3 in 0.5dB steps. See Table 10 01110 Digital Attenuation DACR3 8 UPDATE Not latched Controls simultaneous update of all Attenuation Latches 0: Store RDA3 in intermediate latch (no change to output) 1: Store RDA3 and update attenuation on all channels. 7:0 LDA4[7:0] 11111111 (0dB) Digital Attenuation data for Left channel DACL4 in 0.5dB steps. See Table 10 01111 Digital Attenuation DACL4 8 UPDATE Not latched Controls simultaneous update of all Attenuation Latches 0: Store LDA4 in intermediate latch (no change to output) 1: Store LDA4 and update attenuation on all channels. 7:0 RDA4[7:0] 11111111 (0dB) Digital Attenuation data for Right channel DACR4 in 0.5dB steps. See Table 10 10000 Digital Attenuation DACR4 8 UPDATE Not latched Controls simultaneous update of all Attenuation Latches 0: Store RDA4 in intermediate latch (no change to output) 1: Store RDA4 and update attenuation on all channels. 7:0 MASTDA[7:0] 11111111 (0dB) Digital Attenuation data for all DAC channels in 0.5dB steps. See Table 10 10001 Master Digital Attenuation (all channels) 8 UPDATE Not latched Controls simultaneous update of all Attenuation Latches 0: Store gain in intermediate latch (no change to output) 1: Store gain and update attenuation on all channels. L/RDAX[7:0] ATTENUATION LEVEL 00(hex) - ∞ dB (mute) 01(hex) -127.5dB : : : : : : FE(hex) -0.5dB FF(hex) 0dB Table 10 Digital Volume Control Attenuation Levels The Digital volume control also incorporates a zero cross detect circuit which detects a transition through the zero point before updating the digital volume control with the new volume. This is enabled by control bit DZCEN. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 10011 DAC Control 0 DZCEN 0 DAC Digital Volume Zero Cross Enable: 0: Zero cross detect disabled 1: Zero cross detect enabled |
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