PCF8811USLASH2DASLASH1 datasheet(58/73 Pages) PHILIPS

58 / 73 page

2004 May 17

Philips Semiconductors

Product speciﬁcation

× 128 pixels matrix LCD driver

PCF8811

22.5.2

REFRESH

The action of the ‘Refresh’ instruction is to force the OTP

shift register to re-load from the non-volatile OTP cells.

This instruction takes up to 5 ms to complete. During this

time all other instructions may be sent.

In the PCF8811 the ‘Refresh’ instruction is associated with

the ‘Power control’ instruction so that the shift register is

automatically refreshed every time the high voltage

generator is enabled or disabled. It should be noted

however, that if this instruction is sent while in the

power-save mode, the PC[1:0] bits will be updated but the

refreshing will be ignored.

22.6

Example of ﬁlling the shift register

An example of the sequence of commands and data is

shown in Table 25. In this example the shift register is filled

with the following data: MMVOPCAL =

−4 (11100 BIN),

MMTC = 2 (010 BIN) and the seal bit is 0.

It is assumed that the PCF8811 has just been reset. After

transmitting the last bit the PCF8811 can exit or remain in

the CALMM mode (see step 1). It should be noted that

while in CALMM mode the interface does not recognize

commands in the normal sense.

After this sequence has been applied it is possible to

observe the impact of the data shifted in. The described

sequence is, however, not useful for OTP programming

because the number of bits with the value logic 1 is greater

than that allowed for programming; see Section 22.7.

Figure 49 shows the shift register after this action.

Table 25 Example sequence for ﬁlling the shift register; note 1

Notes

1. X = don’t care.

2. The data for the bits is not in the correct shift register position until all bits have been sent.

STEP

EXT

D/CR/W

ACTION

exit Power-down

wait 5 ms for refresh to take effect

enter CALMM mode

shift in data. MMVOPCAL[4] is ﬁrst

bit; note 2

MMVOPCAL[3]

MMVOPCAL[2]

MMVOPCAL[1]

MMVOPCAL[0]

MMTC[2]

MMTC[1]

MMTC[0]

seal bit; exit CALMM mode

An alternative ending could be to stay in CALMM mode

seal bit; remain in CALMM mode

PCF8811U/2DA/1 датащи(PDF) 58 Page - NXP Semiconductors

PCF8811U/2DA/1 датащи(HTML) 58 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73

датащи скачать

ссылки URL