PIC12F635ESLASHSS datasheet(114/196 Pages) MICROCHIP

114 / 196 page

PIC12F635/PIC16F636/639

DS41232B-page 112

Preliminary

12.1

Configuration Word Bits

The Configuration Word bits can be programmed (read

as ‘0’), or left unprogrammed (read as ‘1’) to select

various device configurations as shown in Register 12-1.

These bits are mapped in program memory location

2007h.

CONFIG – CONFIGURATION WORD (ADDRESS: 2007h)

Note:

Address 2007h is beyond the user program

memory space. It belongs to the special

configuration

memory

space

(2000h-

3FFFh), which can be accessed only during

programming. See “PIC12F6XX/16F6XX

Memory

Programming

Specification”

(DS41204) for more information.

U-1

R/P-1

—

WURE FCMEN

IESO

BODEN1 BODEN0

CPD

MCLRE PWRTE(1) WDTE

FOSC2

F0SC1

F0SC0

bit 13

bit 0

bit 13

Unimplemented: Read as ‘1’

bit 12

WURE: Wake-up Reset Enable bit

= Standard wake-up and continue enabled

= Wake-up and Reset enabled

bit 11

FCMEN: Fail-Safe Clock Monitor Enable bit

= Fail-Safe Clock Monitor enabled

= Fail-Safe Clock Monitor disabled

bit 10

IESO: Internal-External Switchover bit

= Internal External Switchover mode enabled

= Internal External Switchover mode disabled

bit 9-8

BODEN<1:0>: Brown-out Detect Enable bits

= BOD enabled and SBODEN bit disabled

= BOD enabled while running and disabled in Sleep. SBODEN bit disabled.

= SBODEN in Register 2-6 controls BOD function

= BOD and SBODEN disabled

bit 7

CPD: Code Protection Data bit

= Data memory is not protected

= Data memory is external read protected

bit 6

CP: Code Protection bit

= Program memory is not code-protected

= Program memory is external read and write-protected

bit 5

MCLRE: MCLR Pin Function Select bit

= MCLR pin is MCLR function and weak internal pull-up is enabled

= MCLR pin is alternate function, MCLR function is internally disabled

bit 4

PWRTE: Power-up Timer Enable bit(1)

= PWRT disabled

= PWRT enabled

bit 3

WDTE: Watchdog Timer Enable bit

= WDT enabled

= WDT disabled and can be enabled using SWDTEN in Register 12-2

bit 2-0

FOSC<2:0>: Oscillator Selection bits

000

= LP oscillator: Low power crystal on RA5/T1CKI/OSC1/CLKIN and RA4/T1G/OSC2/CLKOUT

001

= XT oscillator: Crystal/resonator on RA5/T1CKI/OSC1/CLKIN and RA4/T1G/OSC2/CLKOUT

010

= HS oscillator: High-speed crystal/resonator on RA5/T1CKI/OSC1/CLKIN and RA4/T1G/OSC2/CLKOUT

011

= EC: I/O function on RA4/T1G/OSC2/CLKOUT, CLKIN on RA5/T1CKI/OSC1/CLKIN

100

= INTOSCIO oscillator: I/O function on RA4/T1G/OSC2/CLKOUT, I/O function on RA5/T1CKI/OSC1/CLKIN

101

= INTOSC oscillator: CLKOUT function on RA4/T1G/OSC2/CLKOUT, I/O function on RA5/T1CKI/OSC1/CLKIN

110

= EXTRCIO oscillator: I/O function on RA4/T1G/OSC2/CLKOUT, RC on RA5/T1CKI/OSC1/CLKIN

111

= EXTRC oscillator: CLKOUT function on RA4/T1G/OSC2/CLKOUT, RC on RA5/T1CKI/OSC1/CLKIN

Note 1:

Enabling Brown-out Detect does not automatically enable the Power-up Timer (PWRT).

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

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