PIC12F635ESLASHSS datasheet(22/196 Pages) MICROCHIP

22 / 196 page

PIC12F635/PIC16F636/639

DS41232B-page 20

Preliminary

2.2.2.1

Status Register

The Status register, shown in Register 2-1, contains:

• the arithmetic status of the ALU

• the Reset status

• the bank select bits for data memory (SRAM)

The Status register can be the destination for any

instruction, like any other register. If the Status register is

the destination for an instruction that affects the Z, DC or

C bits, then the write to these three bits is disabled.

These bits are set or cleared according to the device

logic. Furthermore, the TO and PD bits are not writable.

Therefore, the result of an instruction with the Status

For example, CLRF STATUS, will clear the upper three

bits and set the Z bit. This leaves the Status register as

000u u1uu

(where u = unchanged).

It is recommended, therefore, that only BCF, BSF, SWAPF

and MOVWF instructions are used to alter the Status

Status bits. For other instructions not affecting any Status

bits, see Section 13.0 “Instruction Set Summary”.

STATUS – STATUS REGISTER (ADDRESS: 03h OR 83h)

Note 1: The C and DC bits operate as a Borrow

and Digit Borrow out bit, respectively, in

subtraction. See the SUBLW and SUBWF

instructions for examples.

R/W-0

R-1

R/W-x

IRP

RP1

RP0

ZDC

bit 7

bit 0

bit 7

IRP: Register Bank Select bit (used for indirect addressing)

= Bank 2, 3 (100h-1FFh)

= Bank 0, 1 (00h-FFh)

bit 6-5

RP<1:0>: Register Bank Select bits (used for direct addressing)

= Bank 3 (180h-1FFh)

= Bank 2 (100h-17Fh)

= Bank 1 (80h-FFh)

= Bank 0 (00h-7Fh)

Each bank is 128 bytes.

bit 4

TO: Time-out bit

= After power-up, CLRWDT instruction or SLEEP instruction

= A WDT time-out occurred

bit 3

PD: Power-down bit

= After power-up or by the CLRWDT instruction

= By execution of the SLEEP instruction

bit 2

Z: Zero bit

= The result of an arithmetic or logic operation is zero

= The result of an arithmetic or logic operation is not zero

bit 1

DC: Digit Carry/Borrow bit (ADDWF, ADDLW, SUBLW, SUBWF instructions)

For Borrow, the polarity is reversed.

= A carry-out from the 4th low-order bit of the result occurred

= No carry-out from the 4th low-order bit of the result

bit 0

C: Carry/Borrow bit (ADDWF, ADDLW, SUBLW, SUBWF instructions)

= A carry-out from the Most Significant bit of the result occurred

= No carry-out from the Most Significant bit of the result occurred

Note:

For Borrow, the polarity is reversed. A subtraction is executed by adding the two’s

complement of the second operand. For rotate (RRF, RLF) instructions, this bit is

loaded with either the high-order or low-order bit of the source register.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

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