PIC12F635ESLASHSS datasheet(117/196 Pages) MICROCHIP

117 / 196 page

Preliminary

DS41232B-page 115

PIC12F635/PIC16F636/639

12.6

Brown-out Detect (BOD)

The BODEN0 and BODEN1 bits in the Configuration

Word register select one of four BOD modes. Two

modes have been added to allow software or hardware

control of the BOD enable. When BODEN<1:0> = 01,

the SBODEN bit (PCON<4>) enables/disables the BOD

allowing it to be controlled in software. By selecting

BODEN<1:0>, the BOD is automatically disabled in

Sleep to conserve power and enabled on wake-up. In

this

mode,

the

SBODEN

bit

disabled.

See

If VDD falls below VBOD for greater than parameter

(TBOD) (see Section 15.0 “Electrical Specifications”),

the Brown-out situation will reset the device. This will

occur regardless of VDD slew rate. A Reset is not

ensured to occur if VDD falls below VBOD for less than

parameter (TBOD).

On any Reset (Power-on, Brown-out Detect, Watchdog

Timer, etc.), the chip will remain in Reset until VDD rises

above VBOD (see Figure 12-3). The Power-up Timer

will now be invoked, if enabled and will keep the chip in

Reset an additional nominal 64 ms.

If VDD drops below VBOD while the Power-up Timer is

running, the chip will go back into a Brown-out Detect

and the Power-up Timer will be re-initialized. Once VDD

rises above VBOD, the Power-up Timer will execute a

64 ms Reset.

FIGURE 12-3:

BROWN-OUT DETECT SITUATIONS

Note:

The Power-up Timer is enabled by the

PWRTE bit in the Configuration Word

64 ms(1)

VBOD

VDD

Internal

Reset

VBOD

VDD

Internal

Reset

64 ms(1)

< 64 ms

64 ms(1)

VBOD

VDD

Internal

Reset

Note 1:

Nominal 64 ms delay only if PWRTE bit is programmed to ‘0’.

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