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DM562AP
V.90 Integrated Data/ Fax/Voice/Speakerphone
Modem Device Single Chip with Memory Built in
Preliminary
23
Version: DM562AP-DS-P02
March 05, 2004
11. PCI Configuration Register Definition
The definitions of PCI Configuration Registers are
based on the PCI specification revision 2.1 and
provides the initialization and configuration
information to operate the PCI interface in the
DM6588A. All registers can be accessed with byte,
word, or double word mode. As defined in PCI
specification 2.1, read accesses to reserve or
unimplemented registers will return a value of “0.”
These registers are to be described in the following
sections.
PCI Configuration Registers Mapping :
Description
Identifier
Address
Offset
Value of Reset
Identification
PCIID
00H
6588A1282H
Command & Status
PCICS
04H
04100001H
Revision
PCIRV
08H
07000210H
Miscellaneous
PCILT
0CH
00000000H
I/O Base Address
PCIIO
10H
XXXXXXXx001
Reserved
--------
14H - 28H
Subsystem Identification
PCISID
2CH
undefined
Capability Pointer
CAP_PTR
34H
00000050H
Reserved
--------
38H
Interrupt & Latency
PCIINT
3CH
281401XXH
Power Management Register
PMR
50H
00110001H
Power Management Control &
Status
PMCSR
54H
00000000H
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