FN4749 Rev 6.00

Page 1 of 14

December 30, 2004

FN4749

Rev 6.00

December 30, 2004

HIP6501A

Triple Linear Power Controller with ACPI Control Interface

DATASHEET

The HIP6501A, paired with either the HIP6020 or HIP6021,

simplifies the implementation of ACPI-compliant designs in

microprocessor and computer applications. The IC

integrates two linear controllers and a low-current pass

transistor, as well as the monitoring and control functions

into a 16-pin SOIC package. One linear controller generates

5VSB output during sleep states (S3, S4/S5), powering the

PCI slots through an external pass transistor, as instructed

transistor is used to switch in the ATX 3.3V output for PCI

operation during S0 and S1 (active) operatingstates. The

second linear controller supplies the computer system’s

2.5V/3.3V memory power through an external pass

transistor in active states. During S3 state, an integrated

pass transistor supplies the 2.5V/3.3V sleep-state power. A

the ATX 5V output in active states, or the ATX 5VSB in sleep

states.

The HIP6501A’s operating mode (active-state outputs or

sleep-state outputs) is selectable through two control pins:

S3 and S5. Further control of the logic governing activation

of different power modes is offered through two enabling

linear regulator uses an external N-Channel pass MOSFET

supplied by an ATX (or equivalent) power supply, while

is supplied from the ATX 5VSB through an NPN transistor,

also external to the controller. Active state power delivery for

transistor, or an NMOS switch for the 3.3V setting. In sleep

states, conduction on this output is transferred to an internal

external MOS transistors. In sleep states, a PMOS (or PNP)

transistor conducts the current from the ATX 5VSB output,

while in active states, current flow is transferred to an NMOS

transistor connected to the ATX 5V output. Similar to the

dictated not only by the status of the S3 and S5 pins, but that

of the EN5VDL pin as well.

Features

• Provides 3 ACPI-Controlled Voltages

• Simple Control Design - No Compensation Required

• Excellent Output Voltage Regulation

States Only

- 2.5V/3.3V Output:

2.0% Over Temperature; Both

Operational States (3.3V setting in sleep only)

• Fixed Output Voltages Require No Precision External

Resistors

• Small Size

- Small External Component Count

- 2.5V for RDRAM Memory

- 3.3V for SDRAM Memory

• Under-Voltage Monitoring of All Outputs with Centralized

FAULT Reporting

• Adjustable Soft-Start Function Eliminates 5VSB

Perturbations

• Pb-Free Available (RoHS Compliant)

Pinout

HIP6501A (SOIC)

TOP VIEW

Ordering Information

PART NUMBER

TEMP.

RANGE (°C)

PACKAGE

PKG.

DWG. #

HIP6501ACB

0 to 70

16 Ld SOIC

M16.15

HIP6501ACBZ

(Note)

0 to 70

16 Ld SOIC

(Pb-free)

M16.15

HIP6501AEVAL1

Evaluation Board

*Add “-T” suffix to part number for tape and reel packaging.

NOTE: Intersil Pb-free products employ special Pb-free material sets; molding

compounds/die attach materials and 100% matte tin plate termination finish, which

are RoHS compliant and compatible with both SnPb and Pb-free soldering

operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow

temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC

J STD-020.

10

11

12

13

14

15

16

7

6

5

4

3

2

1

EN3VDL

3V3DLSB

S3

3V3DL

EN5VDL

5VSB

VSEN2

12V

DLA

SS

FAULT/MSEL

5VDL

S5

DRV2

GND

5VDLSB

9

8

NOT RECOMMENDED FOR NEW DESIGNS

NO RECOMMENDED REPLACEMENT

contact our Technical Support Center at

1-888-INTERSIL or www.intersil.com/tsc