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LTC4236 датащи(PDF) 17 Page - Linear Technology |
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LTC4236 датащи(HTML) 17 Page - Linear Technology |
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17 / 24 page ![]() LTC4236 17 4236f For more information www.linear.com/LTC4236 applicaTions inForMaTion 5V, the output clamps at 3.5V if the allowable input sense voltage range is exceeded. IMON Output Filtering A capacitor connected in parallel with ROUT will give a low pass response. This will reduce unwanted noise at the output, and may also be useful as a charge reservoir to keep the output steady while driving a switching circuit such as an ADC (see Figure 5). This output capacitor COUT in parallel with ROUT will create a pole in the output response at: fC = 1 2• π •ROUT •COUT REG Pin Bypassing The LTC4236 has an internally regulated supply near SENSE+ for internal bias of the current sense amplifier. It is not intended for use as a supply or bias pin for external circuitry. A 0.1µF capacitor should be connected between theREGandSENSE+pins.Thiscapacitorshouldbelocated very near to the device and close to the REG pin for the best performance. REG and IMON Start-Up The start-up current of the current sense amplifier when the LTC4236 is powered on consists of two parts: the first is the current necessary to charge the REG bypass capacitor,whichisnominally0.1µF.SincetheREGvoltage charges to approximately 4.1V below the SENSE+ voltage, this can require a significant amount of start-up current. The second source is the output current that flows into ROUT, which upon start-up may temporarily drive the IMON output high for less than 2ms. This is a temporary conditionwhichwillceasewhenthesenseamplifiersettles into normal closed-loop operation. CPO and DGATE Start-Up The CPO pin voltage is initially pulled up to a diode below theIN1orD2SRCpinwhenfirstpoweredup(seeFigure 1). However, for application with back-to-back MOSFETs in IN2 power path, CPO2 starts off at 0V since D2SRC is near ground (see Figure 8). CPO starts ramping up 7µs after INTVCC clears its undervoltage lockout level. Another 40µs later, DGATE also starts ramping up with CPO. The CPO ramp rate is determined by the CPO pull-up current into the combined CPO and DGATE pin capacitances. An internal clamp limits the CPO pin voltage to 12V above the IN1 or D2SRC pin, while the final DGATE pin voltage is determined by the gate drive amplifier. An internal 12V clamp limits the DGATE1 and DGATE2 pin voltages above IN1 and D2SRC respectively. CPO Capacitor Selection TherecommendedvalueofthecapacitorbetweentheCPO1 and IN1, and CP02 and D2SRC pins is approximately 10× the input capacitance CISS of the ideal diode MOSFET. A larger capacitor takes a correspondingly longer time to chargeupbytheinternalchargepump.Asmallercapacitor suffers more voltage drop during a fast gate turn-on event as it shares charge with the MOSFET gate capacitance. MOSFET Selection The LTC4236 drives N-channel MOSFETs to conduct the load current. The important features of the MOSFETs are on-resistanceRDS(ON),themaximumdrain-sourcevoltage BVDSS and the threshold voltage. The gate drive for the ideal diode and Hot Swap MOSFET is guaranteed to be greater than 5V when the supply voltages at IN1 and IN2 are between 2.9V and 7V. When the supply voltages at IN1 and IN2 are greater than 7V, the gate drive is guaranteed to be greater than 10V. The gate drive is limited to 14V. An external Zener diode can be used to clamp the potential from the MOSFET’s gate to source if the rated breakdown voltage is less than 14V. The maximum allowable drain-source voltage BVDSS must be higher than the supply voltage including supply transients as the full supply voltage can appear across the MOSFET. If an input or output is connected to ground, the full supply voltage will appear across the MOSFET. The RDS(ON) should be small enough to conduct the maximumloadcurrent,and alsostaywithintheMOSFET’s power rating. |
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