LTC4236 datasheet(15/24 Pages) LINER

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LTC4236

4236f

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applicaTions inForMaTion

in active current limit. When the voltage across the sense

resistorexceedsthefoldbackcurrentlimitthreshold(from

25mV to 8.3mV), FTMR pulls up with 100µA. Otherwise,

it pulls down with 2µA. The fault timer expires when the

1.235V FTMR threshold is exceeded, causing the FAULT

pin to pull low. For a given fault timer period, the equation

for setting the external capacitor CFT value is:

CFT = tFT • 0.083 [µF/ms]

After the fault timer expires, the FTMR pin capacitor pulls

down with 2µA from the 1.235V FTMR threshold until it

reaches0.2V.Then,itcompletes14coolingcyclesconsist-

ing of the FTMR pin capacitor charging to 1.235V with a

100µA current and discharging to 0.2V with a 2µA current.

At that point, the HGATE pin voltage is allowed to start up

if the fault has been cleared as described in the Resetting

Fault section. When the latched fault is cleared during the

cool-off period, the FAULT pin pulls high. The total cool-off

time for the MOSFET after an overcurrent fault is:

tCOOL = CFT • 8 [s/µF]

After the cool-off period, the HGATE pin is only allowed

to pull up if the fault has been cleared for the latchoff

part. For the auto-retry part, the latched fault is cleared

automatically following the cool-off period and the HGATE

pin voltage is allowed to restart.

Resetting Fault (LTC4236-1)

For the latchoff part, an overcurrent fault is latched after

the fault timer expires and the FAULT pin is asserted low.

Only the Hot Swap MOSFET is turned off and the ideal

diode MOSFETs are not affected.

To reset a latched fault and restart the output, pull the

ON pin below 0.6V for more than 100µs and then high

above 1.235V. The fault latch resets and the FAULT pin

de-asserts on the falling edge of the ON pin. When ON

goes high again and the cool-off cycle has completed, a

debounce timing cycle is initiated before the HGATE pin

voltage restarts. Toggling the EN pin high and then low

again also resets a fault, but the FAULT pin pulls high at

the end of the debounce cycle before the HGATE pin volt-

age starts up. Bringing all the supplies below the INTVCC

undervoltage lockout threshold (2.2V) shuts off all the

MOSFETs and resets the fault latch. A debounce cycle is

initiated before a normal start-up when any of the supplies

is restored above the INTVCC UVLO threshold.

Auto-Retry after a Fault (LTC4236-2)

For the auto-retry part, the latched fault is reset automati-

cally at the end of the cool-off period as described in the

FTMR Pin Functions section. At the end of the cool-off

period, the fault latch is cleared and FAULT pulls high.

The HGATE pin voltage is allowed to start up and turn on

the Hot Swap MOSFET. If the output short persists, the

supply powers up into a short with active current limiting

until the fault timer expires and FAULT again pulls low. A

new cool-off cycle begins with FTMR ramping down with

a 2µA current. The whole process repeats itself until the

output short is removed. Since tFT and tCOOL are a function

of FTMR capacitance CFT, the auto-retry cycle is equal to

0.15%, irrespective of CFT.

Figure 4 shows an auto-retry sequence after an overcur-

rent fault.

100ms/DIV

FTMR

2V/DIV

FAULT

10V/DIV

HGATE

20V/DIV

OUT

10V/DIV

4236 F04

Figure 4. Auto-Retry Sequence After a Fault

Monitor Undervoltage Fault

The ON pin functions as a turn-on control and an input

supply monitor. A resistive divider connected between

the supply diode-OR output (SENSE+) and GND at the

ON pin monitors the supply for undervoltage condition.

The undervoltage threshold is set by proper selection of

the resistors at the ON rising threshold voltage (1.235V).

For Figure 1, if R1 = 2k, R2 = 13.7k, the input supply

undervoltage threshold is set to 9.7V.

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