LTC4236 datasheet(8/24 Pages) LINER

8 / 24 page

LTC4236

4236f

For more information www.linear.com/LTC4236

pin FuncTions

CPO1, CPO2: Charge Pump Output. Connect a capacitor

from CPO1 or CPO2 to the corresponding IN1 or D2SRC

pin. The value of this capacitor is approximately 10×

the gate capacitance (CISS) of the external MOSFET for

ideal diode control. The charge stored on this capacitor

is used to pull up the ideal diode MOSFET gate during a

fast turn-on. Leave this pin open if fast ideal diode turn-

on is not needed.

CS+: Positive Current Sense Input for Current Sense Am-

plifier. Connect this pin to the input of the current sense

resistor.ThevoltagebetweenCS+andSENSE–istranslated

to a ground referenced signal at IMON pin.

DGATE1, DGATE2: Ideal Diode MOSFET Gate Drive Out-

put. Connect this pin to the gate of an external N-channel

MOSFET for ideal diode control. An internal clamp limits

the gate voltage to 12V above and a diode voltage below

IN1 or D2SRC. During fast turn-on, a 1.5A pull-up charges

DGATE from CPO. During fast turn-off, a 1.5A pull-down

discharges DGATE1 to IN1 and DGATE2 to D2SRC.

D2OFF: Control Input. A rising edge above 1.235V turns

off the external ideal diode MOSFET in the IN2 supply path

and a falling edge below 1.215V allows the MOSFET to be

turned on. Connect this pin to an external resistive divider

fromIN1tomakeIN1thehigherpriorityinputsupplywhen

IN1 and IN2 are equal.

D2SRC: Ideal Diode MOSFET Gate Drive Return. Connect

this pin to the source of the external N-channel MOSFET

switch in the IN2 power path. The gate fast pull-down cur-

rent returns through this pin when DGATE2 is discharged.

DSTAT1: Diode MOSFET Status Output. Open drain out-

put that pulls low when the MOSFET gate drive voltage

between DGATE1 and IN1 exceeds 0.7V indicating that the

MOSFET diode path is on. Otherwise it goes high imped-

ance. It requires an external pull-up resistor to a positive

supply. Leave open if unused.

DSTAT2: Diode MOSFET Status Output. Open drain out-

put that pulls low when the MOSFET gate drive voltage

between DGATE2 and D2SRC exceeds 0.7V indicating

that the MOSFET diode path is on. Otherwise it goes high

impedance. It requires an external pull-up resistor to a

positive supply. Leave open if unused.

DTMR: Debounce Timer Capacitor Terminal. Connect

this pin to either INTVCC for fixed 100ms delay or an

external capacitor to ground for adjustable start-up delay

(123ms/µF) when EN toggles low.

EN: Enable Input. Ground this pin to enable Hot Swap

control. If this pin is pulled high, the Hot Swap MOSFET

is not allowed to turn on. A 10µA current source pulls this

pin up to a diode below INTVCC. Upon EN going low when

ON is high, there is a start-up delay for debounce as con-

figured at the DTMR pin, after which the fault is cleared.

FAULT: Overcurrent Fault Status Output. Output that pulls

low when the fault timer expires during an overcurrent

fault. Otherwise it is pulled high by a 10µA current source

to a diode below INTVCC. It may be pulled above INTVCC

using an external pull-up. Leave open if unused.

FB: Foldback and Power Good Comparator Input. Connect

this pin to an external resistive divider from OUT. If the

voltage falls below 1.215V, the PWRGD pin pulls high to

indicate the power is bad. If the voltage falls below 0.9V,

the output power is considered bad and the current limit

is reduced. Tie to INTVCC to disable foldback.

FTMR:FaultTimerCapacitorTerminal.Connectacapacitor

between this pin and ground to set a 12ms/µF duration

for current limit before the external Hot Swap MOSFET is

turned off. The duration of the off time is 8s/µF, resulting

in a 0.15% duty cycle.

GND: Device Ground.

LTC4236 датащи(PDF) 8 Page - Linear Technology

LTC4236 датащи(HTML) 8 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

датащи скачать

ссылки URL