LTC4236 datasheet(14/24 Pages) LINER

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LTC4236

4236f

For more information www.linear.com/LTC4236

applicaTions inForMaTion

a 10µA current. Thereafter, the capacitor is discharged to

ground by a 5mA current. For a given debounce delay, the

equation for setting the external capacitor CDT value is:

CDT = tDB •0.0081 [µF/ms]

Upon board insertion, any bounces on the EN pin restart

the timing cycle. When the debounce timing cycle is done,

the internal fault latch is cleared. If the EN pin remains low

at the end of the timing cycle, HGATE is charged up with

a 10µA current source to turn on the Hot Swap MOSFET.

If the EN pin goes high, indicating a board removal, the

HGATE pin is pulled low with a 2mA current sink after a

20µs delay, turning off the Hot Swap MOSFET without

clearing any latched fault.

Overcurrent Fault

The LTC4236 features an adjustable current limit with

foldback that protects the external MOSFET against short

circuits or excessive load current. The voltage across the

externalsenseresistorRSismonitoredbyanactivecurrent

limit amplifier. The amplifier controls the gate of the Hot

Swap MOSFET to reduce the load current as a function of

theoutputvoltagesensedbytheFBpinduringactivecurrent

limit. A graph in the Typical Performance Characteristics

shows the current limit sense voltage versus FB voltage.

An overcurrent fault occurs when the output has been in

currentlimitforlongerthanthefaulttimerperiodconfigured

at the FTMR pin. Current limiting begins when the sense

voltage between the SENSE+ and SENSE– pins reaches

8.3mV to 25mV depending on the FB pin voltage. The gate

of the Hot Swap MOSFET is brought under control by the

current limit amplifier and the output current is regulated

to limit the sense voltage to less than 25mV. At this point,

the fault timer starts with a 100µA current charging the

FTMR pin capacitor. If the FTMR pin voltage exceeds its

1.235V threshold, the external MOSFET turns off with

HGATE pulled to ground by 2mA and FAULT pulls low.

After the Hot Swap MOSFET turns off, the FTMR pin ca-

pacitor is discharged with a 2µA pull-down current until

its threshold reaches 0.2V. This is followed by a cool-off

period of 14 timing cycles as described in the FTMR Pin

Functions. Figure 2 shows an overcurrent fault on the

12V output.

200µs/DIV

OUT

10V/DIV

HGATE

10V/DIV

ILOAD

20A/DIV

4236 F02

Figure 2. Overcurrent Fault on 12V Output

5µs/DIV

OUT

10V/DIV

HGATE

10V/DIV

ILOAD

20A/DIV

4236 F03

Figure 3. Severe Short-Circuit on 12V Output

Intheeventofasevereshort-circuitfaultonthe12Voutput

as shown in Figure 3, the output current can surge to tens

ofamperes.TheLTC4236respondswithin1µstobringthe

current under control by pulling the HGATE to OUT voltage

downtozerovolts.Almostimmediately,thegateoftheHot

Swap MOSFET recovers rapidly due to the charge stored

in the RHG and CHG network and current is actively limited

until the fault timer expires. Due to parasitic supply lead

inductance, an input supply without any bypass capaci-

tor may collapse during the high current surge and then

spike upwards when the current is interrupted. Figure 9

shows the input supply transient suppressors comprising

of Z1, RSNUB1, CSNUB1 and Z2, RSNUB2, CSNUB2 for the two

supplies if there is no input capacitance.

FTMR Pin Functions

An external capacitor CFT connected from the FTMR pin

to GND serves as fault timing when the supply output is

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