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TLE5012B датащи(PDF) 17 Page - Infineon Technologies AG |
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TLE5012B датащи(HTML) 17 Page - Infineon Technologies AG |
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17 / 50 page ![]() TLE5012B Application Circuits Data Sheet 17 Rev. 2.0, 2014-02 The TLE5012B can be configured with SPC only (Figure 3-5). This is only possible with the TLE5012B - E9000 derivate, which is by default configurated with an open-drain IFA (SPC) pin. Figure 3-5 Application circuit for TLE5012B with only SPC interface (using internal CLK) In Figure 3-5 the IFC (S_NR[1]) and SCK (S_NR[0]) pins are set to ground to generate the slave number (S_NR) 0D (or 00B). For safety reasons it is better that the non-used pins are connected to ground, rather than floating. A resistor between the DATA line pin and ground is recommended to avoid shortcuts if DATA generates any unexpected output. The CSQ line has to be connected to VDD to avoid unintentional activation of the SSC interface. Synchronous Serial Communication (SSC) configuration In Figure 3-1 and Figure 3-2 the SSC interface has the default push-pull configuration (see details in Figure 3-6). Series resistors on the DATA, SCK (serial clock signal) and CSQ (chip select) lines are recommended to limit the current in the erroneous case that either the sensor pushes high and the microcontroller pulls low at the same time or vice versa. The resistors in the SCK and CSQ lines are only necessary in case of disturbances or noise. Figure 3-6 SSC configuration in sensor-slave mode with push-pull outputs (high-speed application) VRG VRA VRD TLE5012B X GMR Y GMR Temp SD- ADC SD- ADC SD- ADC SSC Interface Incremental IF PWM HSM Osc *) recommended , e.g. 2.2kΩ 100nF IFC (S_NR[1]) VDD (3.0 – 5.5V) **) GND PLL CSQ SCK (S_NR[0]) DATA IFA (SPC ) IFB **) recommended , e.g. 10.0kΩ *) Digital Signal Processing Unit CORDIC CCU RAM ISM Fuses Shift Reg. Shift Reg. Clock Gen. DATA MTSR MRST SCK SCK (SSC Slave) TLE 5012B µC (SSC Master) CSQ CSQ **) *) *) EN EN *) optional , e.g. 100 Ω **) optional , e.g. 470 Ω |
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