TLE5012B datasheet(16/50 Pages) INFINEON

16 / 50 page

TLE5012B

Application Circuits

Data Sheet

Rev. 2.0, 2014-02

In case that the IFA, IFB and IFC pins are configurated via the SSC interface as open drain pins, three resistors

(one for each line) between the output line and VDD would be recommended (e.g. 2.2kΩ).

The TLE5012B can be configured with PWM only (Figure 3-3). The derivate TLE5012B - E5000 is by default

configurated with push-pull IFA (PWM) pin. Therefore the following configuration is recommended:

Figure 3-3 Application circuit for TLE5012B with only PWM interface (using internal CLK)

The TLE5012B - E5020 is also a PWM derivate but with open drain IFA (PWM) pin. A pull-up resistor (e.g. 2.2k

Ω)

should then be added between the IFA line and VDD, as shown in Figure 3-4.

Figure 3-4 Application circuit for TLE5012B with only PWM interface (using internal CLK)

For safety reasons it is better that the non-used pins are connected to ground, rather than floating. A resistor

between he DATA line pin and ground is recommended to avoid shortcuts if DATA generates any unexpected

output. The CSQ line has to be connected to VDD to avoid unintentional activation of the SSC interface.

VRG

VRA

VRD

TLE5012B

GMR

Temp

SD-

ADC

SD-

ADC

SD-

ADC

SSC Interface

Incremental IF

PWM

HSM

Osc

*) recommended , e.g. 10.0kΩ

100 nF

IFC

VDD (3.0 – 5.5V)

GND

PLL

CSQ

SCK

DATA

IFA (PWM)

IFB

Digital

Signal

Processing

Unit

CORDIC

CCU

RAM

ISM

Fuses

VRG

VRA

VRD

TLE5012B

GMR

Temp

SD-

ADC

SD-

ADC

SD-

ADC

SSC Interface

Incremental IF

PWM

HSM

Osc

*) recommended , e.g. 2.2kΩ

100nF

IFC

VDD (3.0 – 5.5V)

**)

GND

PLL

CSQ

SCK

DATA

IFA (PWM)

IFB

**) recommended , e.g. 10.0kΩ

Digital

Signal

Processing

Unit

CORDIC

CCU

RAM

ISM

Fuses

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