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HT66F005 датащи(PDF) 39 Page - Holtek Semiconductor Inc |
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HT66F005 датащи(HTML) 39 Page - Holtek Semiconductor Inc |
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39 / 109 page ![]() Rev. 1.30 38 ���i� ��� �01� Rev. 1.30 39 ���i� ��� �01� HT66F005/HT66F006 Cost-Effective A/D Flash MCU with EEPROM HT66F005/HT66F006 Cost-Effective A/D Flash MCU with EEPROM NO RM AL M ode SL E EP0 M ode SL E EP1 M ode ID LE 0 M ode ID LE 1 M ode SL OW M od e CK S2 ~C KS0 ¹ 000B , 001B a s HL CL K= 0 or H LC LK =1 WD T is o f f ID LE N = 0 HA LT i ns tr uc ti on is e xe cu te d WD T is o n ID LE N = 0 HA LT i ns tr uc ti on is e xe cu te d ID LE N = 1, F SYS ON =0 HA LT i ns tr uc ti on i s ex ec ut ed ID LE N = 1, F SYSO N= 1 HA LT i ns tr uc ti on is e xe cu te d SLOW Mode to NORMAL Mode Switching IntheSLOWModethesystemusestheLIRClowspeedsystemoscillator.Toswitchbacktothe NORMALMode,wherethehighspeedsystemoscillatorisused,theHLCLKbitshouldbesetto “1”orHLCLKbitis“0”,butCKS2~CKS0issetto“010”,“011”,“100”,“101”,“110”or“111”. Asacertainamountoftimewillberequiredforthehighfrequencyclocktostabilise,thestatusof theHTObitischecked.Theamountoftimerequiredforhighspeedsystemoscillatorstabilization dependsuponwhichhighspeedsystemoscillatortypeisused. Entering the SLEEP0 Mode ThereisonlyonewayforthesedevicestoentertheSLEEP0Modeandthatistoexecutethe“HALT” instructionintheapplicationprogramwiththeIDLENbitinSMODregisterequalto“0”andthe WDToff.Whenthisinstructionisexecutedundertheconditionsdescribedabove,thefollowingwill occur: • Thesystemclock,WDTclockandTimeBaseclockwillbestoppedandtheapplicationprogram willstopatthe“HALT”instruction. • TheDataMemorycontentsandregisterswillmaintaintheirpresentcondition. • TheWDTwillbeclearedandstopped. • TheI/Oportswillmaintaintheirpresentconditions. • Inthestatusregister,thePowerDownflag,PDF,willbesetandtheWatchdogtime-outflag,TO, willbecleared. |
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