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VSC8113 датащи(PDF) 18 Page - Vitesse Semiconductor Corporation

номер детали VSC8113
подробное описание детали  ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux with Integrated Clock Generation and Clock Recovery
PDF  28 Pages
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производитель  VITESSE [Vitesse Semiconductor Corporation]
домашняя страница  http://www.vitesse.com
Logo VITESSE - Vitesse Semiconductor Corporation

VSC8113 датащи(HTML) 18 Page - Vitesse Semiconductor Corporation

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VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
VSC8113
ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux
with Integrated Clock Generation and Clock Recovery
Page 18
© VITESSE SEMICONDUCTOR CORPORATION
G52154-0, Rev 4.2
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
3/19/99
VDD
31
+3.3V
+3.3V Power Supply
N/C
32
No connection
RX50MCK
33
O
TTL
Constant 51.84MHz ref clock output, derived from the CMU
VSS
34
GND
Ground
RXOUT0
35
O
TTL
Receive output data bit0
RXOUT1
36
O
TTL
Receive output data bit1
VSS
37
GND
Ground
RXOUT2
38
O
TTL
Receive output data bit2
RXOUT3
39
O
TTL
Receive output data bit3
VSS
40
GND
Ground
RXOUT4
41
O
TTL
Receive output data bit4
RXOUT5
42
O
TTL
Receive output data bit5
VSS
43
GND
Ground
RXOUT6
44
O
TTL
Receive output data bit6
RXOUT7
45
O
TTL
Receive output data bit7
VSS
46
GND
Ground
RXLSCKOUT
47
O
TTL
Receive byte clock output
FP
48
O
TTL
Frame detection pulse
VDD
49
+3.3V
+3.3V Power Supply
LOSOUT
50
O
TTL
Loss of Signal alarm indicator
CRUREFCLK
51
I
TTL
Optional external CRU reference clock @77.76MHz
LOSTTL
52
I
TTL
Loss of Signal Control - TTL input
LOSPECL
53
I
PECL
Loss of Signal Control- Single ended PECL input
VDD
54
+3.3V
+3.3V Power Supply
VSS
55
GND
Ground
REFCLK
56
I
TTL
Reference clock input, refer to table 12
LOOPTIM1
57
I
TTL
Enable loop timing operation; active HIGH
VDD
58
+3.3V
+3.3V Power Supply
VSSA
59
GND
Analog Ground (CMU)
VSSA
60
GND
Analog Ground (CMU)
N/C
61
No connection
VDDA
62
+3.3V
Analog Power Supply (CMU)
CP1
63
Analog
CMU external capacitor (see Figure 6, and Table 1)
Table 17: Pin Definitions
Signal
Pin
I/O
Level
Pin Description



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