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VSC8113 датащи(PDF) 4 Page - Vitesse Semiconductor Corporation |
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VSC8113 датащи(HTML) 4 Page - Vitesse Semiconductor Corporation |
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4 / 28 page ![]() VITESSE SEMICONDUCTOR CORPORATION Data Sheet VSC8113 ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux with Integrated Clock Generation and Clock Recovery Page 4 © VITESSE SEMICONDUCTOR CORPORATION G52154-0, Rev 4.2 741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 3/19/99 Loss of Signal The VSC8113 features Loss of Signal (LOS) detection. Loss of Signal is declared if the incoming serial data stream has no transition continuously for more than 128 bits. During an LOS condition, the VSC8113 forces the receive data low which is an indication for any downstream equipment that an optical interface failure has occurred. The receive section continues to be clocked by the CRU as it is now locked to the “CRUREF- CLK” unless “DSBLCRU” is active in which case it will be clocked by the CMU. This LOS condition will be removed when the part detects more than 16 transitions in a 128 bit time window. This LOS detection feature can be disabled by applying a high level to LOSDETEN_ input. The VSC8113 also has a TTL input LOSTTL and a PECL input LOSPECL to force the part into a Loss of Signal state. Most optics have a PECL output usu- ally called “SD” or “FLAG” indicating a lack of or presence of optical power. Depending on the optics manu- factured this signal is either active high or active low. The LOSTTL and LOSPECL inputs are XNOR’d to generate an internal LOS control signal. See Figure 2. The optics “SD” output should be connected to LOSPECL. The LOSTTL input should be tied low if the optics “SD” output is active high. If it’s active low tie LOSTTL high. The inverse is true if the optics use “FLAG” for loss of signal. Figure 2: Data and Clock Receive Block Diagram Facility Loopback The Facility Loopback function is controlled by the FACLOOP signal. When the FACLOOP signal is set high, the Facility Loopback mode is activated and the high speed serial receive data (RXDATAIN) is presented at the high speed transmit output (TXDATAOUT). See Figure 3. In addition, the high speed received/recovered clock is selected and presented at the high speed transmit clock output (TXCLKOUT). In Facility Loopback mode the high speed receive data (RXDATAIN) is also converted to parallel data and presented at the low speed receive data output pins (RXOUT[7:0]). The receive clock (RXCLKIN) is also divided down and presented at the low speed clock output (RXLSCKOUT). DQ DQ DQ 0 1 Divide-by-8 CMU DQ PM5355 DQ RXOUT[7:0] FP RXLSCKOUT VSC8113 CRU RXDATAIN+/- RXCLKIN+/- DSBLCRU 0 1 0 1 CRULOCKDET LOSTTL LOSPECL LOSDETEN_ |
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