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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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DA9021 датащи(PDF) 64 Page - Dialog Semiconductor |
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DA9021 датащи(HTML) 64 Page - Dialog Semiconductor |
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64 / 142 page  DA9021/22 System PMIC with high efficiency USB power manager Datasheet Revision 2.5 17-Feb-2017 CFR0011-120-00 Rev 5 64 of 142 © 2017 Dialog Semiconductor NOTE By connecting TP to VDDCORE DA9021/22 can be configured to load control register default values from the HS 2-wire interface instead from OTP cells. During start-up the power sequencer will then assert pin nVDD_FAULT (set to zero) and wait until an external device has loaded default values into the control registers R10 to R106 after RESET MODE (if VDD_FAULT is asserted), R14 and R43 to R61 when leaving POWERDOWN mode (if VDD_FAULT is not asserted) via HS 2-wire interface. The host has to clear the FAULT_LOG register after loading R10 to R106. When the last register has been loaded nVDD_FAULT will be released and the start-up sequence is continued. During this mode the settings of GPI14 and 15 will be ignored (pins are assigned as 2-wire interface supplied from VDDCORE). |
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