AD9671EBZ datasheet(46/61 Pages) AD

46 / 61 page

Data Sheet

AD9675

Rev. A | Page 45 of 60

MEMORY MAP

READING THE MEMORY MAP TABLE

Each row in the memory map register table has eight bit locations.

The memory map is roughly divided into two sections: the chip

configuration register map (Address 0x000 to Address 0x19E)

and the profile register map (Address 0xF00 to Address 0xFFF).

Registers that are designated as local registers use the device

index in Address 0x004 and Address 0x005 to determine to

which channels of a device the command is applied. Registers

that are designated as chip registers use the chip address mode

in Address 0x115 to determine whether the device is to be

updated by writing to the chip register.

The first column of the memory map indicates the register

address, and the default value is shown in the second rightmost

column. The Bit 7 (MSB) column is the start of the default

hexadecimal value given. For example, Address 0x011, the LNA

and VGA gain adjustment register, has a default value of 0x06,

meaning that Bit 7 = 0, Bit 6 = 0, Bit 5 = 0, Bit 4 = 0, Bit 3 = 0,

Bit 2 = 1, Bit 1 = 1, and Bit 0 = 0, or 0000 0110 in binary. This

setting is the default for GAIN± pins enabled, PGA gain = 24 dB,

and LNA gain = 21.6 dB.

For more information about the SPI memory map and other

functions, see the AN-877 Application Note, Interfacing to

High Speed ADCs via SPI.

Reserved Locations

Do not write to undefined memory locations except when

writing the default values suggested in this data sheet. Addresses

that have values marked as 0 must be considered reserved and

have a 0 written into their registers during power-up.

Default Values

After a reset, critical registers are automatically loaded with default

values. These values are indicated in Table 31, where an X refers

to an undefined feature (don’t care).

Logic Levels

An explanation of various registers follows: “bit is set” is

synonymous with “bit is set to Logic 1” or “writing Logic 1 for

the bit.” Similarly, “bit is cleared” is synonymous with “bit is set

to Logic 0” or “writing Logic 0 for the bit.”

RECOMMENDED START-UP SEQUENCE

To save system power during programming, the AD9675 powers

up in power-down mode. To start the device up and initialize

the data interface, the SPI commands listed in Table 30 are

recommended. At a minimum, write the profile memory for an

index of 0 (Address 0xF00 to Address 0xF07; see Table 27). If

additional profiles and coefficient memory are required, write

these profiles and coefficient memory blocks after Profile File

Memory 0.

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