AD5593R

Data Sheet

Rev. C | Page 10 of 33

TOP VIEW

(BALL SIDE DOWN)

Not to Scale

1

A

B

C

D

23

4

BALL A1

INDICATOR

SDA

SCL

A0

I/O0

I/O3

I/O2

I/O1

RESET

GND

I/O7

I/O4

I/O5

I/O6

Figure 5. 16-Ball WLCSP Pin Configuration

Table 8. 16-Ball WLCSP Pin Function Descriptions

Pin No.

Mnemonic

Description

A3

RESET

Asynchronous Reset Pin. Tie this pin high for normal operation. When this pin is brought low, the AD5593R is

reset to its default configuration.

A4

A0

Address Input. Sets the LSB of the 7-bit slave address.

B4

Power Supply Input. The AD5593R can operate from 2.7 V to 5.5 V. Decouple the supply with a 0.1 μF capacitor to GND.

B3, C4, C3,

C2, D1, D4,

C1, B2

I/O0 to I/O7

Input/Output 0 through Input/Output 7. These pins can be independently configured as DACs, ADCs, or general-

purpose digital inputs or outputs. The function of each pin is determined by programming the appropriate bits

in the configuration registers.

D3

Reference Input/Output. When the internal reference is enabled, the 2.5 V reference voltage is available on the

from the AD5593R. When the internal reference is disabled, an external reference must be applied to this pin.

D2

Interface Power Supply. The voltage ranges from 1.8 V to 5.5 V.

B1

GND

Ground Reference Point for All Circuitry.

A1

SDA

Serial Data Input. This pin is used in conjunction with the SCL line to clock data into or out of the input shift register.

A2

SCL

Serial Clock Line. This is used in conjunction with the SDA line to clock data into or out of the 16-bit input register.