AD5560JSVUZ datasheet(39/67 Pages) AD

39 / 67 page

AD5560

Data Sheet

Rev. E | Page 38 of 66

stability problems. This is most likely to be the case when there

are both a large CR and large RC.

The RP resistor is intended to solve this problem. Again, it is

prudent not to cancel exact pole/zero cancellation with RZ and

instead allow the zero to be 2× to 3× the frequency of the pole.

It is best to be very conservative when using RZ to cancel the

load pole. Choose a high zero frequency to avoid flat spots in

the gain curve that extend bandwidth, and be conservative when

choosing RP to create a pole. Aim to place the RZ zero at 5× the

exact cancellation frequency and the RP pole at around 2× the

exact cancellation frequency. The best solution here is to avoid

this complexity by using a high quality capacitor with low ESR.

COMPENSATION STRATEGIES

Ensuring Stability into an Unknown Capacitor Up to a

Maximum Value

If the AD5560 has to be stable in a range of load capacitance

from no load capacitance to an upper limit, then select manual

compensation mode and, in Compensation Register 2, set the

parameters according to the maximum load capacitance listed

in Table 14.

Table 14. Suggested Compensation Settings for Load Capa-

citance Range of Unknown Value to Some Maximum Value

Capacitor

gm[1:0]

RP[2:0]

RZ[2:0]

CC[3:1]

CF[2:0]

Min

Max

0.22 μF

000

2.2 μF

001

10 μF

010

20 μF

011

160 μF

111

Table 14 assumes that the CCx and CFx capacitor values are those

suggested in Table 8.

Making a circuit stable over a range of load capacitances for

no load capacitance or greater means that the circuit is over-

compensated for small load capacitances, undercompensated

for high load capacitances, or both. The previous choice settings,

along with the suggested capacitor values, is a compromise

between both. By compromising phase margin into the largest

load capacitors, the system bandwidth can be increased, which

means better performance under load current transient condi-

tions. The disadvantage is that there is more overshoot during a

large DAC step. To reduce this at the expense of settling time, it

may be desirable to temporarily switch a capacitor range 5× or

10× larger before making a large DAC step.

OPTIMIZING PERFORMANCE FOR A KNOWN

CAPACITOR USING AUTOCOMPENSATION MODE

The autocompensation mode decides what values of gmx, CCx

CFx, RZ, and RP should be chosen for good performance in a

particular capacitor. Both the capacitance and its ESR need to

be known. To avoid creating an oscillator, the capacitance should

not be overestimated and the ESR should not be underesti-

mated. Use the following steps to determine compensation

settings when using the manual compensation register (this

algorithm is what the autocompensation method is based upon):

1. Use CR (the load capacitance with a series ESR) and RC (the

ESR of that load capacitance) as inputs.

2. Assume that CR has not been overestimated and that RC has

not been underestimated. (Although, when the ESR RC is

shown to have a frequency dependence, the lowest RC that

occurs near the resonant frequency is probably a better

guide. However, do not underestimate this ESR).

a. CC0 is the suggested 100 pF.

b. CFx capacitor values are as suggested, and they extend

up to 2.2 µF (CF4). For faster settling into small

capacitive loads, include smaller CFx values such as CF3

and CF2. If a capacitor is not included, then short the

corresponding CFx pin to one that is.

c. There is approximately 1 Ω of parasitic resistance, RC,

from the AD5560 to the DUT (for example, the cable);

RC = 1 Ω.

3. Select gm[1:0] = 2, CC[3:1] = 000. This makes the input stage of

the force amplifier; have gmx = 300 µA/V; deselect the

compensation capacitors, CC1, CC2, CC3, so that only CC0 is

active.

4. Choose a CF[2:0] value from 0 to 4 to select the largest CFx

capacitor that is smaller than CR.

5. If CR < 100 nF, then set RZ[2:0] = 0, RP[2:0] = 0. This ends the

algorithm.

6. Calculate R0, the resistive impedance to the DUT, using the

following steps:

a. Calculate RS, the sense resistor, from the selected

current range using RS = 0.5 V/IRANGE.

b. Calculate RF, the output impedance, through the CFx

capacitor, by using

RF = 1.2 Ω + (ESR of CFx capacitor)

c. Calculate RFM, a modified version of RF, which takes

account of frequency dependent peaking, through the

CFx buffers into a large capacitive load, by using

RFM = RF/(1 + [2 × (CFx/2.2 μF)])

That is, RFM is up to 3× smaller than RF, when the

selected CFx capacitor is large compared to 2.2 μF.

Then calculate

R0 = RC + (RS ||RFM)

where RC takes its value from the assumptions in Step 2.

7. If RC > (R0/5), then the ESR is large enough to make the

DUT look resistive. Choose RZ[2:0] = 0, RP[2:0] = 0. This ends

the algorithm

8. Calculate the unity gain frequency (Fug), the ideal unity

gain frequency of the force amplifier, from Fug =

gmx/2πCC0. Using the previously suggested values (gm[1:0] = 2

gives gmx = 300 µA/V and CC0 = 100 pF), Fug calculates to

480 kHz.

9. Calculate FP, the load pole frequency, using FP =

1/(2πR0CC0).

AD5560JSVUZ датащи(PDF) 39 Page - Analog Devices

AD5560JSVUZ датащи(HTML) 39 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67

датащи скачать

ссылки URL